+2011-09-21 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.c (def_builtin): Change from macro into function.
+ (def_builtin_const): New.
+ (sparc_vis_init_builtins): Use def_builtin_const for all VIS builtins
+ other than alignaddr and falignaddr.
+
+2011-09-21 Tom de Vries <tom@codesourcery.com>
+
+ * final.c (final): Handle if JUMP_LABEL is not LABEL_P.
+
+2011-09-20 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (UNSPEC_ALIGNADDRL): New unspec.
+ (aligneddrl<P:mode>_vis): New pattern.
+ (edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis,
+ edge32l_vis): Adjust to take Pmode arguments, and return SImode.
+ * config/sparc/sparc.c (sparc_vis_init_builtins): Handle new
+ alignaddrl insn, and adjust edge operations for updated types.
+ * config/sparc/visintrin.h: Likewise.
+ * doc/extend.texi: Make typing in VIS documentation match reality.
+
+2011-09-20 Terry Guo <terry.guo@arm.com>
+
+ * config/arm/arm-arches.def: Add armv6s-m.
+ * config/arm/arm-tables.opt: Regenerate.
+
+2011-09-20 Wei Guozhi <carrot@google.com>
+
+ PR rtl-optimization/49452
+ * postreload.c (reload_combine): Invalidate use information when across
+ volatile insn.
+
+2011-09-19 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * haifa-sched.c (has_edge_p, prev_non_location_insn, check_cfg):
+ Remove maintenance overhead.
+ (haifa_sched_init, sched_finish): Update.
+
+2011-09-19 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/mmx.md (*mov<mode>_internal_rex64): Use if_then_else RTX
+ to calculate unit, prefix_rep and prefix_data16 attributes.
+ (*mov<mode>_internal): Ditto for unit attribute.
+ (*movv2sf_internal_rex64): Ditto for unit and prefix_rep attributes.
+ (*movv2sf_internal): Ditto.
+ * config/i386/sse.md (VI1248_256): Remove mode iterator.
+ (avx2_eq<mode>3): Use VI_256 instead of VI1248_256.
+ (*avx2_eq<mode>3): Ditto.
+ (avx2_gt<mode>3): Ditto.
+
+2011-09-19 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (maxmin): New code iterator.
+ * config/i386/sse.md (<maxmin:code><mode>3): Macroize expander
+ from <umaxmin:code><mode>3 and <smaxmin:code><mode>3 using maxmin
+ code iterator.
+ (*avx2_<maxmin:code><mode>3): Macroize isn from
+ *avx2_<umaxmin:code><mode>3 and *avx2_<smaxmin:code><mode>3 using
+ maxmin code iterator.
+ (<smaxmin:code><VI124_128:mode>3): Merge with <smaxmin:code>v8hi3.
+ (<umaxmin:code><VI124_128:mode>3): Merge with umaxv4si3 and
+ <umaxmin:code>v16qi3.
+
+2011-09-19 Alan Modra <amodra@gmail.com>
+ Michael Meissner <meissner@linux.vnet.ibm.com>
+
+ PR target/50341
+ * config/rs6000/rs6000.md (call_indirect_aix<ptrsize>): Do not
+ split the load of the indirect function's TOC from the call to
+ prevent the compiler from moving the load of the new TOC above
+ code that references the current function's TOC.
+ (call_indirect_aix<ptrsize>_internal): Ditto.
+ (call_indirect_aix<ptrsize>_nor11): Ditto.
+ (call_indirect_aix<ptrsize>_internal2): Ditto.
+ (call_value_indirect_aix<ptrsize>): Ditto.
+ (call_value_indirect_aix<ptrsize>_internal): Ditto.
+ (call_value_indirect_aix<ptrsize>_nor11): Ditto.
+ (call_value_indirect_aix<ptrsize>_internal2): Ditto.
+
+2011-09-19 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/sse.md (*sse4_1_extractps): Change into
+ define_insn_and_split, add =x 0 n and =x x n alternatives
+ and split them after reload.
+
+2011-09-19 Alexandre Oliva <aoliva@redhat.com>
+
+ * tree.h (TREE_NOT_CHECK4): Rename from bogus NON_TREE_CHECK4.
+
+2011-09-19 Alexandre Oliva <aoliva@redhat.com>
+
+ * emit-rtl.c (copy_insn_1): Do not copy DEBUG_EXPRs.
+
+2011-09-19 Ira Rosen <ira.rosen@linaro.org>
+
+ PR tree-optimization/50413
+ * tree-vect-data-refs.c (vect_analyze_data_refs): Fail to vectorize
+ a basic block if one of its data-refs can't be analyzed.
+
+2011-09-19 Paul Brook <paul@codesourcery.com>
+
+ * config/arm/predicates.md (shift_amount_operand): Check constant
+ shift count is in range.
+ (const_shift_operand): Remove.
+
+2011-09-18 Eric Botcazou <ebotcazou@adacore.com>
+ Iain Sandoe <developer@sandoe-acoustics.co.uk>
+
+ PR target/50091
+ * config/rs6000/rs6000.md (probe_stack): Use explicit operand.
+ * config/rs6000/rs6000.c (output_probe_stack_range): Likewise.
+
+2011-09-18 H.J. Lu <hongjiu.lu@intel.com>
+
+ * config/i386/bmiintrin.h: Remove tmp.
+ * config/i386/tbmintrin.h: Likewise.
+
+2011-09-18 Ira Rosen <ira.rosen@linaro.org>
+
+ PR tree-optimization/50414
+ * tree-vect-slp.c (vect_get_constant_vectors): Handle MAX_EXPR and
+ MIN_EXPR.
+
+2011-09-18 Ira Rosen <ira.rosen@linaro.org>
+
+ PR tree-optimization/50412
+ * tree-vect-data-refs.c (vect_analyze_group_access): Fail for
+ acceses that require epilogue loop if vectorizing outer loop.
+
+2011-09-17 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (UNSPEC_EDGE8, UNSPEC_EDGE8L,
+ UNSPEC_EDGE16, UNSPEC_EDGE16L, UNSPEC_EDGE32, UNSPEC_EDGE32L):
+ New unspecs.
+ (define_attr type): New type 'edge'.
+ (edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis,
+ edge32l_vis): New patterns.
+ * config/sparc/ultra1_2.md: Add insn reservation for 'edge'.
+ * config/sparc/ultra3.md: Likewise.
+ * config/sparc/niagara.md: Likewise.
+ * config/sparc/niagara2.md: Likewise.
+ * config/sparc/sparc.d (sparc_vis_init_builtins): Generate
+ builtins for VIS edge instructions.
+ * config/sparc/visintrin.h (__vis_edge8, __vis_edge8l)
+ (__vis_edge16, __vis_edge16l, __vis_edge32, __vis_edge32l): New
+ intrinsics.
+ (__v8qi, __v4qi): Make unsigned.
+ (__vis_faligndatadi, ___vis_faligndatav2si, __vis_faligndatav4hi,
+ __vis_faligndatav8qi, __vis_fmul8x16au, __vis_fmul8x16al,
+ __vis_fpack32): Fix types.
+ * doc/extend.texi: Document new 'edge' VIS intrinsics.
+
+ * gcc/config/sparc/sparc.c (niagara2_costs): Adjust integer
+ divide costs.
+ (niagara3_costs): New.
+ (sparc_option_override): Use it.
+ * gcc/config/sparc/niagara2.md: Adjust with more accurate
+ Niagara-3 reservations.
+
+2011-09-17 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/sse.md (VIMAX_AVX2): Change V4DI to V2TI.
+ (sse2_avx, sseinsnmode): Add V2TI.
+ (REDUC_SMINMAX_MODE): New mode iterator.
+ (reduc_smax_v4sf, reduc_smin_v4sf, reduc_smax_v8sf,
+ reduc_smin_v8sf, reduc_smax_v4df, reduc_smin_v4df): Remove.
+ (reduc_<code>_<mode>): New smaxmin and umaxmin expanders.
+ (sse2_lshrv1ti3): Rename to...
+ (<sse2_avx2>_lshr<mode>3): ... this. Use VIMAX_AVX2 mode
+ iterator. Move before umaxmin expanders.
+ * config/i386/i386.h (VALID_AVX256_REG_MODE,
+ SSE_REG_MODE_P): Accept V2TImode.
+ * config/i386/i386.c (ix86_expand_reduc): Handle V32QImode,
+ V16HImode, V8SImode and V4DImode.
+
+ * config/i386/i386.c (ix86_build_const_vector): Handle V8SImode
+ and V4DImode.
+ (ix86_build_signbit_mask): Likewise.
+ (ix86_expand_int_vcond): Likewise. Handle V16HImode and V32QImode.
+ (bdesc_args): Use CODE_FOR_{s,u}m{ax,in}v{32q,16h,8s}i3
+ instead of CODE_FOR_avx2_{s,u}m{ax,in}v{32q,16h,8s}i3.
+ * config/i386/sse.md (avx2_<code><mode>3 umaxmin expand): Rename to...
+ (<code><mode>3) ... this.
+ (avx2_<code><mode>3 smaxmin expand): Rename to...
+ (<code><mode>3) ... this.
+ (smax<mode>3, smin<mode>3): Macroize using smaxmin code iterator.
+ (smaxv2di3, sminv2di3): Macroize using smaxmin code iterator and
+ VI8_AVX2 mode iterator.
+ (umaxv2di3, uminv2di3): Macroize using umaxmin code iterator and
+ VI8_AVX2 mode iterator.
+ (vcond<V_256:mode><VI_256:mode>, vcondu<V_256:mode><VI_256:mode>):
+ New expanders.
+
+2011-09-17 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/ia64/itanium2.md: Use match_test rather than eq/ne symbol_ref
+ throughout file.
+
+2011-09-16 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/visintrin.h: New file.
+ * config.gcc: Add it to extra_headers on sparc.
+
+2011-09-16 Jakub Jelinek <jakub@redhat.com>
+
+ * config/i386/i386.c (ix86_expand_reduc_v4sf): Rename to ...
+ (ix86_expand_reduc): ... this. Handle also V8SFmode and V4DFmode.
+ * config/i386/sse.md (reduc_splus_v4sf, reduc_smax_v4sf,
+ reduc_smin_v4sf): Adjust callers.
+ (reduc_smax_v8sf, reduc_smin_v8sf, reduc_smax_v4df, reduc_smin_v4df):
+ New expanders.
+
+ * config/i386/sse.md (vec_extract_hi_<mode>,
+ vec_extract_hi_v16hi, vec_extract_hi_v32qi): Use
+ vextracti128 instead of vextractf128 for -mavx2 and
+ integer vectors. For V4DFmode fix up mode attribute.
+ (VEC_EXTRACT_MODE): For TARGET_AVX add 32-byte vectors.
+ (vec_set_lo_<mode>, vec_set_hi_<mode>): For VI8F_256 modes use V4DF
+ instead of V8SF mode attribute.
+ (avx2_extracti128): Change into define_expand.
+ * config/i386/i386.c (ix86_expand_vector_extract): Handle
+ 32-byte vector modes if TARGET_AVX.
+
+2011-09-16 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md: (umulqihi3, mulqihi3): Write as one pattern.
+ (umulqi3_highpart, smulqi3_highpart): Ditto.
+ (*maddqihi4.const, *umaddqihi4.uconst): Ditto.
+ (*msubqihi4.const, *umsubqihi4.uconst): Ditto.
+ (*muluqihi3.uconst, *mulsqihi3.sconst): Ditto.
+
+2011-09-16 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/50358
+ * config/avr/avr.md (*ashiftqihi2.signx.1): New insn.
+ (*maddqi4, *maddqi4.const): New insns.
+ (*msubqi4, *msubqi4.const): New insns.
+ * config/avr/avr.c (avr_rtx_costs): Record costs of above in cases
+ PLUS:QI and MINUS:QI. Increase costs of multiply-add/-sub for
+ HImode by 1 in the case of multiplying with a CONST_INT.
+ Record cost of *ashiftqihi2.signx.1 in case ASHIFT:QI.
+
+2011-09-15 Jan Hubicka <jh@suse.cz>
+
+ PR lto/50430
+ * gimple-fold.c (gimple_get_virt_method_for_binfo): Do not ICE on
+ error_mark_node in the DECL_INITIAL of vtable.
+
2011-09-15 Diego Novillo <dnovillo@google.com>
* Makefile.in (SYSROOT_CFLAGS_FOR_TARGET): Define from
@SYSROOT_CFLAGS_FOR_TARGET@.
- * configure.ac (SYSROOT_CFLAGS_FOR_TARGET): Set from
- build-sysroot.
+ * configure.ac (SYSROOT_CFLAGS_FOR_TARGET): Set from build-sysroot.
* configure: Regenerate.
(site.exp): Add definition of TEST_ALWAYS_FLAGS.
Remove setting of GCC_UNDER_TEST.
OSDN Git Service
