+2008-06-16 Eric B. Weddington <eric.weddington@atmel.com>
+
+ * config/avr/avr.c (avr_mcu_t): Add atmega32m1.
+ * config/avr/avr.h (LINK_SPEC, CRT_BINUTILS_SPECS): Likewise.
+ * config/avr/t-avr (MULTILIB_MATCHES): Likewise.
+
+2008-06-16 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * Makefile.in (FLAGS_TO_PASS): Add $(datarootdir).
+
+2008-06-16 Ira Rosen <irar@il.ibm.com>
+
+ PR tree-optimization/36493
+ * tree-vect-transform.c (vect_create_data_ref_ptr): Remove TYPE from
+ the arguments list. Use VECTYPE to create vector pointer.
+ (vectorizable_store): Fail if accesses through a pointer to vectype
+ do not alias the original memory reference operands.
+ Call vect_create_data_ref_ptr without the removed argument.
+ (vectorizable_load): Likewise.
+ (vect_setup_realignment): Call vect_create_data_ref_ptr without the
+ removed argument.
+
+2008-06-015 Andy Hutchinson <hutchinsonandy@aim.com>
+
+ PR target/36336
+ * config/avr/avr.h (LEGITIMIZE_RELOAD_ADDRESS): Add check for
+ reg_equiv_constant.
+
+2008-06-15 Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ * config/mips/loongson2ef.md: New file.
+ * config/mips/mips.md (UNSPEC_LOONGSON_ALU1_TURN_ENABLED_INSN)
+ (UNSPEC_LOONGSON_ALU2_TURN_ENABLED_INSN)
+ (UNSPEC_LOONGSON_FALU1_TURN_ENABLED_INSN)
+ (UNSPEC_LOONGSON_FALU2_TURN_ENABLED_INSN): New constants.
+ (define_attr "cpu"): Rename loongson2e and loongson2f to loongson_2e
+ and loongson_2f.
+ (loongson2ef.md): New include.
+ * config/mips/loongson.md (vec_pack_ssat_<mode>, vec_pack_usat_<mode>)
+ (add<mode>3, paddd, ssadd<mode>3, usadd<mode>3)
+ (loongson_and_not_<mode>, loongson_average_<mode>, loongson_eq_<mode>)
+ (loongson_gt_<mode>, loongson_extract_halfword)
+ (loongson_insert_halfword_0, loongson_insert_halfword_2)
+ (loongson_insert_halfword_3, loongson_mult_add, smax<mode>3)
+ (umax<mode>3, smin<mode>3, umin<mode>3, loongson_move_byte_mask)
+ (umul<mode>3_highpart, smul<mode>3_highpart, loongson_smul_lowpart)
+ (loongson_umul_word, loongson_pasubub, reduc_uplus_<mode>)
+ (loongson_psadbh, loongson_pshufh, loongson_psll<mode>)
+ (loongson_psra<mode>, loongson_psrl<mode>, sub<mode>3, psubd)
+ (sssub<mode>3, ussub<mode>3, vec_interleave_high<mode>)
+ (vec_interleave_low<mode>): Define type attribute.
+ * config/mips/mips.c (mips_ls2): New static variable.
+ (mips_issue_rate): Update to handle tuning for Loongson 2E/2F.
+ (mips_ls2_init_dfa_post_cycle_insn, mips_init_dfa_post_cycle_insn)
+ (sched_ls2_dfa_post_advance_cycle, mips_dfa_post_advance_cycle):
+ Implement target scheduling hooks.
+ (mips_multipass_dfa_lookahead): Update to handle tuning for
+ Loongson 2E/2F.
+ (mips_sched_init): Initialize data for Loongson scheduling.
+ (mips_ls2_variable_issue): New static function.
+ (mips_variable_issue): Update to handle tuning for Loongson 2E/2F.
+ Add sanity check.
+ (TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN)
+ (TARGET_SCHED_DFA_POST_ADVANCE_CYCLE): Override target hooks.
+ * config/mips/mips.h (TUNE_LOONGSON_2EF): New macros.
+ (ISA_HAS_XFER_DELAY, ISA_HAS_FCMP_DELAY, ISA_HAS_HILO_INTERLOCKS):
+ Handle ST Loongson 2E/2F cores.
+ (CPU_UNITS_QUERY): Define macro to enable querying of DFA units.
+
+2008-06-15 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * omp-low.c (extract_omp_for_data): Fix comment typo.
+ * c.opt: Fix typo.
+
+2008-06-15 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * doc/sourcebuild.texi (Config Fragments): Remove obsolete
+ FIXME note about gcc/config.guess.
+ * doc/options.texi (Option file format): Remove non-ASCII bytes.
+ * doc/cpp.texi: Expand TABs, drop indentation outside examples.
+ * doc/cppopts.texi: Likewise.
+ * doc/extend.texi: Likewise.
+ * doc/gcc.texi: Likewise.
+ * doc/gccint.texi: Likewise.
+ * doc/gcov.texi: Likewise.
+ * doc/gty.texi: Likewise.
+ * doc/hostconfig.texi: Likewise.
+ * doc/install.texi: Likewise.
+ * doc/invoke.texi: Likewise.
+ * doc/loop.texi: Likewise.
+ * doc/makefile.texi: Likewise.
+ * doc/md.texi: Likewise.
+ * doc/passes.texi: Likewise.
+ * doc/tm.texi: Likewise.
+ * doc/tree-ssa.texi: Likewise.
+ * doc/trouble.texi: Likewise.
+
+2008-06-15 Mark Shinwell <shinwell@codesourcery.com>
+ Nathan Sidwell <nathan@codesourcery.com>
+ Maxim Kuvyrkov <maxim@codesourcery.com>
+ Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips-modes.def: Add V8QI, V4HI and V2SI modes.
+ * config/mips/mips-protos.h (mips_expand_vector_init): New.
+ * config/mips/mips-ftypes.def: Add function types for Loongson-2E/2F
+ builtins.
+ * config/mips/mips.c (mips_split_doubleword_move): Handle new modes.
+ (mips_hard_regno_mode_ok_p): Allow 64-bit vector modes for Loongson.
+ (mips_vector_mode_supported_p): Add V2SImode, V4HImode and
+ V8QImode cases.
+ (LOONGSON_BUILTIN, LOONGSON_BUILTIN_ALIAS): New.
+ (CODE_FOR_loongson_packsswh, CODE_FOR_loongson_packsshb,
+ (CODE_FOR_loongson_packushb, CODE_FOR_loongson_paddw,
+ (CODE_FOR_loongson_paddh, CODE_FOR_loongson_paddb,
+ (CODE_FOR_loongson_paddsh, CODE_FOR_loongson_paddsb)
+ (CODE_FOR_loongson_paddush, CODE_FOR_loongson_paddusb)
+ (CODE_FOR_loongson_pmaxsh, CODE_FOR_loongson_pmaxub)
+ (CODE_FOR_loongson_pminsh, CODE_FOR_loongson_pminub)
+ (CODE_FOR_loongson_pmulhuh, CODE_FOR_loongson_pmulhh)
+ (CODE_FOR_loongson_biadd, CODE_FOR_loongson_psubw)
+ (CODE_FOR_loongson_psubh, CODE_FOR_loongson_psubb)
+ (CODE_FOR_loongson_psubsh, CODE_FOR_loongson_psubsb)
+ (CODE_FOR_loongson_psubush, CODE_FOR_loongson_psubusb)
+ (CODE_FOR_loongson_punpckhbh, CODE_FOR_loongson_punpckhhw)
+ (CODE_FOR_loongson_punpckhwd, CODE_FOR_loongson_punpcklbh)
+ (CODE_FOR_loongson_punpcklhw, CODE_FOR_loongson_punpcklwd): New.
+ (mips_builtins): Add Loongson builtins.
+ (mips_loongson_2ef_bdesc): New.
+ (mips_bdesc_arrays): Add mips_loongson_2ef_bdesc.
+ (mips_builtin_vector_type): Handle unsigned versions of vector modes.
+ (MIPS_ATYPE_UQI, MIPS_ATYPE_UDI, MIPS_ATYPE_V2SI, MIPS_ATYPE_UV2SI)
+ (MIPS_ATYPE_V4HI, MIPS_ATYPE_UV4HI, MIPS_ATYPE_V8QI, MIPS_ATYPE_UV8QI):
+ New.
+ (mips_expand_vector_init): New.
+ * config/mips/mips.h (HAVE_LOONGSON_VECTOR_MODES): New.
+ (TARGET_CPU_CPP_BUILTINS): Define __mips_loongson_vector_rev
+ if appropriate.
+ * config/mips/mips.md: Add unspec numbers for Loongson
+ builtins. Include loongson.md.
+ (MOVE64): Include Loongson vector modes.
+ (SPLITF): Include Loongson vector modes.
+ (HALFMODE): Handle Loongson vector modes.
+ * config/mips/loongson.md: New.
+ * config/mips/loongson.h: New.
+ * config.gcc: Add loongson.h header for mips*-*-* targets.
+ * doc/extend.texi (MIPS Loongson Built-in Functions): New.
+
+2008-06-14 Joseph Myers <joseph@codesourcery.com>
+
+ * config.gcc (arc-*-elf*, avr-*-*, fr30-*-elf, frv-*-elf,
+ h8300-*-elf*, h8300-*-*, i[34567]86-*-elf*, x86_64-*-elf*,
+ i[34567]86-*-aout*, i[34567]86-*-coff*, ia64*-*-elf*,
+ iq2000*-*-elf*, m32r-*-elf*, m32rle-*-elf*, m32r-*-linux*,
+ m32rle-*-linux*, m68hc11-*-*|m6811-*-*, m68hc12-*-*|m6812-*-*,
+ m68k-*-coff*, mcore-*-elf, mcore-*-pe*, mipsisa64sr71k-*-elf*,
+ mipsisa64sb1-*-elf* | mipsisa64sb1el-*-elf*, mips-*-elf* |
+ mipsel-*-elf*, mips64-*-elf* | mips64el-*-elf*, mips64vr-*-elf* |
+ mips64vrel-*-elf*, mips64orion-*-elf* | mips64orionel-*-elf*,
+ mipstx39-*-elf* | mipstx39el-*-elf*, mn10300-*-*, pdp11-*-,
+ powerpc-*-elf*, powerpcle-*-elf*, sh-*-elf* | sh[12346l]*-*-elf* |
+ sh-*-symbianelf* | sh[12346l]*-*-symbianelf* | sh-*-linux* |
+ sh[2346lbe]*-*-linux* | sh-*-netbsdelf* | shl*-*-netbsdelf* |
+ sh5-*-netbsd* | sh5l*-*-netbsd* | sh64-*-netbsd* |
+ sh64l*-*-netbsd*, sh-*-*, sparc-*-elf*, sparc64-*-elf*,
+ v850e1-*-*, v850e-*-*, v850-*-*, xstormy16-*-elf, m32c-*-elf*):
+ Remove use_fixproto=yes.
+ (ia64*-*-hpux*): Remove comment about using fixproto.
+ (m68k-*-uclinuxoldabi*, m68k-*-uclinux*): Remove use_fixproto=no.
+
+2008-06-14 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
+
+ * configure.ac: Update gthr-default.h lazily, to avoid unneeded
+ library rebuilds.
+ * configure: Regenerate.
+
+2008-06-13 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR middle-end/36520
+ * builtins.c (get_memory_rtx): Test for the presence of DECL_SIZE_UNIT
+ before evaluating it.
+
+2008-06-13 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/36507
+ * c-decl.c (merge_decls): Don't clear DECL_EXTERNAL for
+ nested inline functions.
+ (start_decl, start_function): Don't invert DECL_EXTERNAL
+ for nested inline functions.
+
+2008-06-13 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.md: Remove TARGET_DEBUG_D_MODE conditions from
+ splits that must be made for correctness.
+
+2008-06-13 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (BUILTIN_AVAIL_NON_MIPS16): New macro.
+ (AVAIL_NON_MIPS16): Likewise.
+ (mips_builtin_description): Replace target_flags with a predicate.
+ (paired_single, sb1_paired_single, mips3d, dsp, dspr2, dsp_32)
+ (dspr2_32): New availability predicates.
+ (MIPS_BUILTIN): New macro.
+ (DIRECT_BUILTIN, CMP_SCALAR_BUILTINS, CMP_PS_BUILTINS)
+ (CMP_4S_BUILTINS, MOVTF_BUILTINS, CMP_BUILTINS)
+ (DIRECT_NO_TARGET_BUILTIN, BPOSGE_BUILTIN): Use it.
+ Replace the TARGET_FLAGS parameters with AVAIL parameters.
+ (mips_ps_bdesc, mips_sb1_bdesc, mips_dsp_bdesc)
+ (mips_dsp_32only_bdesc): Merge into...
+ (mips_builtins): ...this new array.
+ (mips_bdesc_map, mips_bdesc_arrays): Delete.
+ (mips_init_builtins): Update after above changes.
+ (mips_expand_builtin_1): Merge into...
+ (mips_expand_builtin): ...here and update after above changes.
+
+2008-06-12 Paul Brook <paul@codesourcery.com>
+
+ * longlong.h (__arm__): Define count_leading_zeros.
+ * config/arm/lib1funcs.asm (xxh, xxl, yyh, yyl): Define.
+ (clzsi2, clzdi2): New functions.
+ * config/arm/bpabi-v6m.S (xxh, xxl, yyh, yyl): Remove.
+ * config/arm/bpabi.S (xxh, xxl, yyh, yyl): Remove.
+ * config/arm/t-strongarm-elf (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-vxworks (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-pe (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-arm-elf (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-arm-coff (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-linux (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-symbian (LIB1ASMFUNCS): Ditto.
+ * config/arm/t-wince-pe (LIB1ASMFUNCS): Ditto.
+
+2008-06-12 Kazu Hirata <kazu@codesourcery.com>
+
+ * config/m68k/m68k.c (m68k_tune_flags): New.
+ (override_options): Compute m68k_tune_flags.
+ (MULL_COST, MULW_COST): Update for various variants of CFV2.
+ * config/m68k/m68k.h (TUNE_MAC, TUNE_EMAC): New.
+
+2008-06-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/36506
+ * omp-low.c (expand_omp_sections): Initialize l2 to avoid bogus
+ warning.
+
+2008-06-12 Eric Botcazou <ebotcazou@adacore.com>
+
+ * tree-inline.c (copy_body_r): Copy TREE_SIDE_EFFECTS along with
+ TREE_THIS_VOLATILE on INDIRECT_REF nodes.
+
+2008-06-12 Eric Botcazou <ebotcazou@adacore.com>
+
+ * expr.c (store_field): Do a block copy from BLKmode to BLKmode-like.
+ (get_inner_reference): Use BLKmode for byte-aligned BLKmode bitfields.
+
+2008-06-12 Jakub Jelinek <jakub@redhat.com>
+
+ PR middle-end/36506
+ * omp-low.c (expand_omp_sections): Handle #pragma omp sections with
+ reductions.
+
+2008-06-12 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/36345
+ * tree-flow.h (struct ptr_info_def): Align escape_mask,
+ add memory_tag_needed flag.
+ (may_alias_p): Declare.
+ * tree-ssa-alias.c (may_alias_p): Export.
+ (set_initial_properties): Use memory_tag_needed flag.
+ (update_reference_counts): Likewise.
+ (reset_alias_info): Reset memory_tag_needed flag.
+ (create_name_tags): Check memory_tag_needed flag.
+ (dump_points_to_info_for): Dump it.
+ * tree-ssa-structalias.c (struct variable_info): Remove
+ directly_dereferenced flag.
+ (new_var_info): Do not initialize it.
+ (process_constraint_1): Do not set it.
+ (update_alias_info): Set is_dereferenced flag.
+ (set_uids_in_ptset): Use may_alias_p.
+ (set_used_smts): Check memory_tag_needed flag.
+ (find_what_p_points_to): Likewise. Pass is_dereferenced flag.
+ * tree-ssa-alias.c (verify_flow_sensitive_alias_info): Check
+ memory_tag_needed flag.
+ * tree-ssa-alias-warnings.c (dsa_named_for): Try to recover
+ from broken design.
+
+2008-06-12 Kai Tietz <kai.tietz@onevision.com>
+
+ * config/i386/i386.c (ix86_compute_frame_layout): Disable red zone for
+ w64 abi.
+ (ix86_expand_prologue): Likewise.
+ (ix86_force_to_memory): Likewise.
+ (ix86_free_from_memory): Likewise.
+
+2008-06-11 Edmar Wienskoski <edmar@freescale.com>
+
+ PR target/36425
+ * config/rs6000/rs6000.c (rs6000_override_options): Set
+ rs6000_isel conditionally to the absence of comand line
+ override.
+ * config/rs6000/linuxspe.h (SUBSUBTARGET_OVERRIDE_OPTIONS):
+ Remove duplicate rs6000_isel setting.
+ * config/rs6000/eabispe.h: Ditto.
+
+2008-06-11 Richard Guenther <rguenther@suse.de>
+
+ * alias.c (get_alias_set): Use the element alias-set for arrays.
+ (record_component_aliases): For arrays and vectors do nothing.
+ * c-common.c (strict_aliasing_warning): Handle the cases
+ of alias set zero explicitly.
+ * Makefile.in (dfp.o-warn): Add -Wno-error.
+
+2008-06-11 Joseph Myers <joseph@codesourcery.com>
+
+ * config.gcc (all_defaults): Add arch_32 arch_64 cpu_32 cpu_64
+ tune_32 tune_64.
+ (i[34567]86-*-* | x86_64-*-*): Add arch_32 arch_64 cpu_32 cpu_64
+ tune_32 tune_64 to supported_defaults. Allow values not
+ supporting 64-bit mode for arch_32, cpu_32 and tune_32 for
+ x86_64. Do not override cpu_32 or cpu_64 values from target name.
+ (i[34567]86-*-linux*, i[34567]86-*-solaris2.1[0-9]*): Only default
+ with_cpu_64 to generic for 64-bit-supporting configurations, not
+ with_cpu. Remove FIXMEs.
+ * doc/install.texi (--with-cpu-32, --with-cpu-64, --with-arch-32,
+ --with-arch-64, --with-tune-32, --with-tune-64): Document.
+ * config/i386/i386.h (OPT_ARCH32, OPT_ARCH64): Define.
+ (OPTION_DEFAULT_SPECS): Add tune_32, tune_64, cpu_32, cpu_64,
+ arch_32 and arch_64.
+
+2008-06-11 Eric Botcazou <ebotcazou@adacore.com>
+ Olivier Hainque <hainque@adacore.com>
+
+ * builtins.c (get_memory_rtx): Accept byte-addressable bitfields.
+ Use DECL_SIZE_UNIT to retrieve the size of the field.
+
+2008-06-11 Joseph Myers <joseph@codesourcery.com>
+
+ * config/arm/arm.c (arm_init_neon_builtins): Move initialization
+ with function calls after declarations. Lay out
+ neon_float_type_node before further use.
+
+2008-06-11 Richard Guenther <rguenther@suse.de>
+
+ * tree-flow.h (may_point_to_global_var): Declare.
+ * tree-ssa-alias.c (may_point_to_global_var): New function.
+ * tree-ssa-sink.c (is_hidden_global_store): Use it.
+
+2008-06-10 Kazu Hirata <kazu@codesourcery.com>
+
+ * configure.ac: Teach that fido supports .debug_line.
+ * configure: Regenerate.
+
+2008-06-10 Tom Tromey <tromey@redhat.com>
+
+ * c-lex.c (fe_file_change): Pass SOURCE_LINE to start_source_file
+ debug hook.
+
+2008-06-10 Joseph Myers <joseph@codesourcery.com>
+
+ * dfp.c (WORDS_BIGENDIAN): Define to 0 if not defined.
+ (encode_decimal64, decode_decimal64, encode_decimal128,
+ decode_decimal128): Reverse order of 32-bit parts of value if host
+ and target endianness differ.
+
+2008-06-10 Vinodha Ramasamy <vinodha@google.com>
+ * value_prob.c (tree_divmod_fixed_value_transform): Use gcov_type.
+ Avoid division by 0.
+ (tree_mod_pow2_value_transform): Likewise.
+ (tree_ic_transform): Likewise.
+ (tree_stringops_transform): Likewise.
+ (tree_mod_subtract_transform): Likewise.
+ * tree-inline-c (copy_bb): Corrected int type to gcov_type.
+ (copy_edges_for_bb): Likewise.
+ (initialize_cfun): Likewise.
+
+2008-06-10 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*btdi_rex64): Change operand 1 predicate to
+ nonmemory_operand. Add "N" operand constraint.
+ (*btsi): Ditto.
+ (*jcc_btdi_mask_rex64): New instruction and split pattern.
+ (*jcc_btsi_mask): Ditto.
+ (*jcc_btsi_mask_1): Ditto.
+
+2008-06-10 Joseph Myers <joseph@codesourcery.com>
+
+ * config/rs6000/rs6000.c (build_opaque_vector_type): Set
+ TYPE_CANONICAL for copied element type.
+
+2008-06-10 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/36473
+ * config/i386/i386.c (ix86_tune_features) [TUNE_USE_BT]:
+ Add m_CORE2 and m_GENERIC.
+ * config/i386/predicates.md (bt_comparison_operator): New predicate.
+ * config/i386/i386.md (*btdi_rex64): New instruction pattern.
+ (*btsi): Ditto.
+ (*jcc_btdi_rex64): New instruction and split pattern.
+ (*jcc_btsi): Ditto.
+ (*jcc_btsi_1): Ditto.
+ (*btsq): Fix Intel asm dialect operand order.
+ (*btrq): Ditto.
+ (*btcq): Ditto.
+
+2008-06-09 Andy Hutchinson <hutchinsonandy@aim.com>
+
+ PR middle-end/36447
+ * simplify-rtx.c (simplify_subreg): Add check for shift count
+ greater than size.
+
+2008-06-09 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * doc/md.texi: Synchronize with later constraints.md change.
+ * longlong.h (umul_ppmm): Replace the MIPS asm implementation
+ with a C implementation.
+ * config/mips/mips.c (mips_legitimize_move): Remove MFHI and
+ MFLO handling.
+ (mips_subword): Assume TImode for CONST_INTs if TARGET_64BIT.
+ (mips_split_doubleword_move): Use special MTHI and MFHI instructions
+ when moving to and from MD_REGNUM.
+ (mips_output_move): Don't handle moves from GPRs to HI_REGNUM.
+ Handle moves from LO_REGNUM to GPRs using MFLO, MACC or DMACC.
+ Handle byte and halfword moves.
+ (mips_hard_regno_mode_ok_p): Handle MD_REGS and DSP_ACC_REGS
+ separately.
+ * config/mips/constraints.md (h): Turn into NO_REGS.
+ (l, x): Update documentation.
+ * config/mips/mips.md (UNSPEC_MFHILO): Delete.
+ (UNSPEC_MFHI, UNSPEC_MTHI, UNSPEC_SET_HILO): New.
+ (UNSPEC_TLS_LDM, UNSPEC_TLS_GET_TP): Renumber.
+ (HILO): New mode iterator.
+ (MOVE128): Add TI.
+ (any_div): New code iterator.
+ (u): Extend code attribute to div and udiv.
+ (*add<mode>3_mips16, *movdi_64bit_mips16, *movsi_mips16): Use
+ d_operand in the splitters. Remove redundant CONST_INT checks.
+ (mulsi3_mult3, mul<mode>3_internal, mul<mode>3_r4000, *mul_acc_si)
+ (*macc, *msac, *msac_using_macc, *macc2, *msac2, *mul_sub_si)
+ (*muls): Remove "=h" clobbers. Adjust peephole2s and define_splits
+ accordingly, using normal moves instead of unspecs to move LO into
+ a GPR. Use d_operand and lo_operand instead of *_REG_P checks.
+ (<u>mulsidi3): Handle expansion in C code.
+ (<u>mulsidi3_32bit_internal): Rename to...
+ (<u>mulsidi3_32bit): ...this.
+ (<u>mulsidi3_32bit_r4000): Fix insn separator.
+ (*<u>mulsidi3_64bit): Rename to...
+ (<u>mulsidi3_64bit): ...this. Combine DImode "=h" and "=l" clobbers
+ into a TImode "=x" clobber. In the split, use an UNSPEC_SET_HILO
+ to set LO and HI to the multiplication result. Use a normal move
+ for MFLO and an unspec for MFHI.
+ (*<u>mulsidi3_64bit_parts): Replace with...
+ (<u>mulsidi3_64bit_hilo): ...this new instruction.
+ (<su>mulsi3_highpart): Extend to TARGET_FIX_R4000.
+ (<su>mulsi3_highpart_internal): Turn into a define_insn_and_split
+ and extend it to TARGET_FIX_R4000. Store the destination in a GPR
+ instead of HI. Split the instruction into a separate multiplication
+ and MFHI if !TARGET_FIX_R4000.
+ (<su>muldi3_highpart): Likewise.
+ (<su>mulsi3_highpart_mulhi_internal): Remove the first alternative
+ and the "=h" clobber.
+ (*<su>mulsi3_highpart_neg_mulhi_internal): Likewise.
+ (<u>mulditi3): New expander.
+ (<u>mulditi3_internal, <u>mulditi3_r4000): New patterns.
+ (madsi): Remove "=h" clobber.
+ (divmod<mode>4, udivmod<mode>4): Turn into define_insn_and_splits.
+ Force the modulus result to be a GPR and split the instruction into
+ a division followed by an MFHI after reload.
+ (<u>divmod<GPR:mode>4_hilo_<HILO:mode>): New instruction.
+ (*lea_high64): Use d_operand in the define_peephole2. Likewise
+ the MIPS16 HIGH define_split.
+ (*movdi_32bit, *movdi_gp32_fp64, *movdi_32bit_mips16): Change type
+ of acc<->gpr moves to "multi".
+ (*movdi_64bit): Replace the single "x" alternative with
+ alternatives for moving into and out of "a".
+ (*movhi_internal, *movqi_internal): Likewise. Use mips_output_move.
+ (*movsi_internal): Extend the "d<-A" alternative to "d<-a".
+ (*movdi_64bit_mips16, *movsi_mips16): Add d<-a alternatives.
+ Use d_operand in the splitters. Remove redundant CONST_INT checks.
+ (*movhi_mips16, *movqi_mips16): Likewise. Use mips_output_move.
+ (movti): New expander.
+ (*movti, *movti_mips16): New insns.
+ (mfhilo_<mode>, *mfhilo_<mode>, *mfhilo_<mode>_macc): Delete.
+ (mfhi<GPR:mode>_<HILO:mode>): New pattern.
+ (mthi<GPR:mode>_<HILO:mode>): Likewise.
+ * config/mips/predicates.md (fpr_operand): Delete.
+ (d_operand): New predicate.
+
2008-06-09 Michael Meissner <michael.meissner@amd.com>
* config.gcc (i[34567]86-*-*): Put test in quotes to prevent
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