+2006-12-16 Manuel Lopez-Ibanez <manu@gcc.gnu.org>
+
+ PR middle-end/7651
+ * c.opt (Wempty-body): New.
+ * doc/invoke.texi (Wempty-body): Document it.
+ (Wextra): Enabled by -Wextra.
+ * c-opts.c (c_common_post_options): Enabled by -Wextra.
+ * c-common.c (empty_body_warning): Replace Wextra with Wempty-body.
+ * c-parser.c (c_parser_c99_block_statement): Likewise.
+
+2006-12-15 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/30185
+ * config/rs6000/rs6000.md (div<mode>3): Use correct mode in
+ force_reg call.
+
+2006-12-15 Andrew Pinski <pinski@gmail.com>
+
+ PR tree-opt/30140
+ * tree-inline.c (setup_one_parameter): Gimplify the statement if
+ the variable is not a gimple register variable.
+
+2006-12-15 Uros Bizjak <ubizjak@gmail.com>
+
+ * invoke.texi (mstringop-strategy): Add missing "byte_loop" value.
+
+2006-12-14 Jan Hubicka <jh@suse.cz>
+
+ * tree-flow.h (struct stmt_ann_d): Move bitfield references_memory
+ to proper place.
+
+2006-12-14 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/30197
+ * builtins.c (fold_builtin_cexp): New function to fold cexp
+ to cexpi and exp parts.
+ * tree-ssa-pre.c (try_combine_conversion): Also handle
+ REALPART_EXPR and IMAGPART_EXPR.
+
+2006-12-14 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/30172
+ * fold-const.c (fold_binary): Fold __complex__ ( x, 0 )
+ + __complex__ ( 0, y ) to __complex__ ( x, y ).
+ Fold __complex__ (x, y) * +-I to __complex__ (-+y, +-x).
+
+2006-12-14 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/30198
+ * fold-const.c (fold_unary): Fold REALPART_EXPR of cexpi to cos.
+ Fold IMAGPART_EXPR of cexpi to sin.
+
+2006-12-14 Dorit Nuzman <dorit@il.ibm.com>
+ Trevor Smigiel <trevor_smigiel@playstation.sony.com>
+
+ * spu.c (TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD): Defined.
+ (spu_init_builtins): Mark the SPU_MASK_FOR_LOAD builtin decl as read
+ only.
+ (spu_expand_builtin_1): Handle the SPU_MASK_FOR_LOAD builtin.
+ (spu_builtin_mask_for_load): New.
+ * spu-builtins.def (SPU_MASK_FOR_LOAD): Define new builtin.
+ * spu.md (UNSPEC_SPU_REALIGN_LOAD, UNSPEC_SPU_MASK_FOR_LOAD):New.
+ (vec_realign_load_<mode>, spu_lvsr): New.
+
+2006-12-13 Ian Lance Taylor <iant@google.com>
+
+ PR c++/19564
+ PR c++/19756
+ * c-typeck.c (parser_build_binary_op): Move parentheses warnings
+ to warn_about_parentheses in c-common.c.
+ * c-common.c (warn_about_parentheses): New function.
+ * c-common.h (warn_about_parentheses): Declare.
+ * doc/invoke.texi (Warning Options): Update -Wparentheses
+ description.
+
+2006-12-13 Zdenek Dvorak <dvorakz@suse.cz>
+
+ * tree-ssa-loop-ivopts.c: Include tree-affine.h.
+ (divide): Removed.
+ (constant_multiple_of): Fix order of operators for division.
+ (aff_combination_const, aff_combination_elt, aff_combination_scale,
+ aff_combination_add_elt, aff_combination_add, aff_combination_convert,
+ tree_to_aff_combination, add_elt_to_tree, unshare_aff_combination,
+ aff_combination_to_tree): Moved to tree-affine.c and made to work with
+ double_int coefficients.
+ (get_computation_aff, get_computation_at): Work with double_int
+ coefficients.
+ (get_computation_cost_at): Do not use divide.
+ (rewrite_use_nonlinear_expr, rewrite_use_address, rewrite_use_compare):
+ Assert that expressing the computation did not fail.
+ * tree-ssa-address.c: Include tree-affine.h.
+ (add_to_parts, most_expensive_mult_to_index, addr_to_parts,
+ create_mem_ref): Work with double_int coefficients.
+ * tree-affine.c: New file.
+ * tree-affine.h: New file.
+ * tree-flow.h (struct affine_tree_combination): Removed.
+ * Makefile.in (tree-affine.o): Add.
+ (tree-ssa-address.o, tree-ssa-loop-ivopts.o): Add tree-affine.h
+ dependency.
+
+2006-12-13 Peter Bergner <bergner@vnet.ibm.com>
+
+ PR middle-end/30191
+ Revert:
+ * reload1.c (eliminate_regs_in_insn): Merge the plus_src "else" and
+ the offset == 0 "then" clauses.
+ * config/rs6000/predicates.md (gpc_reg_operand): Check for
+ reload_in_progress.
+
+2006-12-13 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.h (FIRST_PSEUDO_REGISTER): Define to 53.
+ (FIXED_REGISTERS, CALL_USED_REGISTERS): Remove dir register.
+ (REG_ALLOC_ORDER): Remove one element due to removal of dir register.
+ (FRAME_POINTER_REGNUM): Update register number to 20.
+ (REG_CLASS_CONTENTS): Update contents due to removed dir register.
+ (HI_REGISTER_NAMES): Remove "dirflag".
+
+ * config/i386/i386.c (regclass_map): Remove dirflag entry.
+ (dbx_register_map, dbx64_register_map, svr4_dbx_register_map):
+ Remove "dir" entry.
+ (ix86_md_asm_clobbers): Remove "dirflag" default asm clobber.
+
+ * config/i386/i386.md (R10_REG, R11_REG): Renumber.
+ (sse_prologue_save, *sse_prologue_save_insn): Renumber
+ hardcoded SSE register numbers.
+
+ * config/i386/mmx.md (mmx_emms, mmx_femms): Renumber
+ hardcoded MMX register numbers.
+
+
2006-12-13 Mark Shinwell <shinwell@codesourcery.com>
* config/arm/arm.c (arm_output_fldmx): Output FLDMD instead of
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