+2012-02-28 Thomas Koenig <tkoenig@gcc.gnu.org>
+
+ PR tree-optimization/53207
+ * doc/invoke.texi: Document as experimental and relying on graphite.
+
+2012-02-28 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr-devices.c (avr_mcu_type): Adjust NULL part
+ of initializer to changes from r184614.
+
+2012-02-28 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/52395
+ * tree-sra.c (build_ref_for_offset): Also look at the base
+ TYPE_ALIGN when figuring out the alignment of the replacement.
+
+2012-02-28 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/52402
+ * ipa-prop.c (ipa_modify_call_arguments): Properly use
+ mis-aligned types when creating the accesses at the call site.
+
+2012-02-28 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/builtins.def: New file.
+ * config/avr/t-avr (avr.o, avr-c.o): Depend on it.
+ * config/avr/avr.c (enum avr_builtin_id): Use it.
+ (avr_init_builtins): Use it. And use avr_bdesc.
+ (bdesc_1arg): Remove.
+ (bdesc_2arg): Remove.
+ (bdesc_3arg): Remove.
+ (struct avr_builtin_description): Add field n_args.
+ (avr_bdesc): New static variable using builtins.def.
+ (avr_expand_builtin): Use it.
+ Don't call avr_expand_delay_cycles if op0 is not CONST_INT.
+ (avr_fold_builtin): Fold AVR_BUILTIN_SWAP.
+ Don't fold AVR_BUILTIN_INSERT_BITS if arg0 is not INTEGER_CST.
+
+2012-02-28 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/52148
+ * config/avr/avr.md (movmem_<mode>): Replace match_operand that
+ match only one single hard register with respective hard reg rtx.
+ (movmemx_<mode>): Ditto.
+ * config/avr/avr.c (avr_emit_movmemhi): Adapt expanding to new
+ insn anatomy of movmem[x]_<mode>.
+ (avr_out_movmem): Same for printing assembler and operand usage.
+
+2012-02-28 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/49868
+ PR target/52261
+ * doc/extend.texi (AVR Named Address Spaces): No more try to fix
+ address spaces located outside of device flash.
+
+ * config/avr/avr.h (base_arch_s): Remove field n_segments.
+ (mcu_type_s): Add field n_flash.
+ * config/avr/avr-devices.c (avr_arch_types): Remove .n_segments.
+ Set .have_elpm and .have_elpmx to 1 for avrxmega4 and avrxmega5.
+ (AVR_MCU): Add N_FLASH argument.
+ * config/avr/avr-mcus.def (AVR_MCU): Add initializer for .n_flash.
+ * config/avr/avr-c.c (avr_cpu_cpp_builtins): Only define built-in
+ macro __FLASH<n> if that address space makes sense for the device.
+ * config/avr/avr.c (avr_out_lpm): Don't try to fix address spaces
+ outside of target flash.
+ (avr_asm_named_section): Ditto.
+ (avr_asm_select_section): Ditto.
+ (avr_addr_space_convert): Ditto.
+ (avr_emit_movmemhi): Ditto.
+ (avr_nonconst_pointer_addrspace, avr_pgm_check_var_decl): Error if
+ address space is outside of device flash.
+ (avr_insert_attributes): Ditto.
+ (avr_xload_libgcc_p): Use avr_current_device->n_flash instead of
+ avr_current_arch->n_segments.
+
+2012-02-27 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/52352
+ * config/i386/i386.md (*movabs<mode>_1): Enable only for
+ TARGET_LP64.
+ (*movabs<mode>_2): Likewise.
+
+2012-02-27 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/52375
+ * config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Use
+ s_register_operand in the test instead of REG_P. Don't call
+ gen_reg_rtx if it won't be used.
+
+ PR tree-optimization/52376
+ * ipa-split.c (split_function): Ignore CLOBBER stmts.
+
+2012-02-27 Stuart Henderson <shenders@gcc.gnu.org>
+
+ * ifcvt.c (noce_get_condition): Check condition variable is not
+ small_register_classes_for_mode_p before accepting.
+
+2012-02-27 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.md (*movabs<mode>_1): Fix operand 1 constraints.
+
+2012-02-27 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+
+ Revert:
+ 2012-01-09 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
+ * config/arm/arm-cores.def (cortex-a15): Use cortex_a15_tune for
+ tuning parameters.
+ * config/arm/arm.c (arm_cortex_a15_tune): New static variable.
+
+2012-02-27 Oleg Endo <olegendo@gcc.gnu.org>
+
+ * config/sh/sh.h: Delete dead GO_IF_LEGITIMATE_INDEX macro.
+
+2012-02-26 Oleg Endo <olegendo@gcc.gnu.org>
+
+ * config/sh/predicates.md: Remove blank lines.
+ * config/sh/sh.c: Fix typos in comments.
+ * config/sh/constraints.md: Likewise.
+ * config/sh/sh.md: Remove blank lines.
+ Fix typos in comments. Use ;; as comment characters.
+
+2012-02-26 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.c (match_pcrel_step2): Fix instruction pattern.
+ (replace_mov_pcrel_step2): Ditto.
+
+2012-02-25 Alexandre Oliva <aoliva@redhat.com>
+
+ PR debug/52001
+ * alias.c (refs_newer_value_cb, refs_newer_value_p): New.
+ (get_addr): Walk canonical value's locs. Avoid returning VALUEs
+ and locs that reference values newer than the non-canonical value
+ at hand. Return the canonical value as a worst case.
+ (memrefs_conflict_p): Walk canonical value's locs.
+
+ PR debug/52001
+ * cselib.c (preserve_only_constants): Rename to...
+ (preserve_constants_and_equivs): ... this. Split out...
+ (invariant_or_equiv_p): ... this. Preserve plus expressions
+ of other preserved expressions too.
+ (cselib_reset_table): Adjust.
+ * var-tracking.c (reverse_op): Use canonical value to build
+ reverse operation.
+
+2012-02-23 Kai Tietz <ktietz@redhat.com>
+
+ * config/i386/i386.c (ix86_delegitimize_address): Handle
+ UNSPEC_PCREL plus displacement.
+
+2012-02-24 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/52261
+ * config/avr/avr.c (avr_out_movhi_mr_r_xmega): Use base
+ to test for unusedness in st X addressing.
+
+2012-02-24 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/52361
+ * gimple.c (walk_gimple_op): Use predicates with less redundant tests.
+ (is_gimple_reg_type): Move inline ...
+ * gimple.h (is_gimple_reg_type): ... here.
+
+2012-02-24 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/52361
+ * passes.c (execute_function_todo): When verifying SSA form
+ verify gimple form first.
+ * tree-ssa.c (verify_ssa): Do not verify gimple form here.
+
+2012-02-24 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/52355
+ * fold-const.c (fold_addr_of_array_ref_difference): New function.
+ (fold_binary_loc): Use it to extend the existing &a[i] - &a[j] folding.
+
+2012-02-13 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * tree-if-conv (predicate_scalar_phi): Commentary typo fix.
+
+2012-02-23 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * tree-phinodes.c (make_phi_node): Mark static.
+ * tree-flow.h (make_phi_node): Remove extern decl.
+ * doc/gimple.texi (make_phi_node): Remove documentation.
+
+2012-02-23 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * tree-into-ssa (update_ssa): Avoid trailing whitespace in dump_file.
+ * tree-ssa-sccvn.c (print_scc): Ditto.
+
+2012-02-23 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * doc/passes.texi (Full redundancy elimination): Fix typo.
+
+2012-02-23 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
+
+ * doc/invoke.texi (-fdse, -fdce): Remove duplicate entries.
+
+2012-02-23 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR bootstrap/52287
+ * haifa-sched.c (rank_for_schedule): Stabilize sort for debug insns.
+
+2012-02-23 Uros Bizjak <ubizjak@gmail.com>
+
+ PR c/52290
+ * c-decl.c (start_function): Exit early if decl1 is not FUNTION_DECL.
+
+2012-02-23 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md (code_stdname): Add ior, xor.
+ (xior): New code iterator.
+ (*<code_stdname><mode>qi.byte0): Use xior instead of ior.
+ (*<code_stdname><mode>qi.byte1-3): Ditto.
+
+2012-02-23 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/52019
+ * ipa-split.c (find_return_bb, find_retval, visit_bb): Ignore
+ CLOBBER stmts.
+
+2012-02-23 Ulrich Weigand <Ulrich.Weigand@de.ibm.com>
+
+ * acinclude.m4: Use HAVE_INITFINI_ARRAY_SUPPORT instead of
+ HAVE_INITFINI_ARRAY to work around namespace pollution in
+ certain versions of newlib system headers.
+ * config.in: Regenerate.
+ * configure: Regenerate.
+ * config/initfini-array.h: Use HAVE_INITFINI_ARRAY_SUPPORT
+ instead of HAVE_INITFINI_ARRAY.
+
+2012-02-22 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/52330
+ * config/i386/i386.c (ix86_print_operand) <case 'H'>: Error out if x
+ is not offsettable memory reference.
+
+2012-02-22 Georg-Johann Lay <avr@gjlay.de>
+
+ PR target/18145
+ * config/avr/avr.c (avr_asm_output_aligned_decl_common): Skip
+ setting avr_need_clear_bss_p for __gnu_lto* symbols.
+
+2012-02-22 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.h (avr_accumulate_outgoing_args): Return int.
+ * config/avr/avr.c (avr_accumulate_outgoing_args): Return int.
+
+2012-02-22 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ * configure.ac (LIB_TLS_SPEC): Enforce use of alternate thread
+ library on Solaris 8 even without TLS support.
+ * configure: Regenerate.
+
+2012-02-22 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/52329
+ * gimple-fold.c (fold_stmt_1): Also canonicalize ADDR_EXPRs
+ for GIMPLE_DEBUG stmts.
+
+2012-02-22 Martin Jambor <mjambor@suse.cz>
+
+ PR middle-end/51782
+ * emit-rtl.c (set_mem_attributes_minus_bitpos): Set address space
+ according to the base object.
+
+2012-02-22 Georg-Johann Lay <avr@gjlay.de>
+
+ PR rtl-optimization/50063
+ * config/avr/avr.md (movhi_sp_r): Handle -1 (unknown IRQ state)
+ and 2 (8-bit SP) in operand 2.
+ * config/avr/avr.c (avr_prologue_setup_frame): Adjust prologue
+ setup to use movhi_sp_r instead of vanilla move to write SP.
+ Adjust REG_CFA notes to superseed unspec.
+ (expand_epilogue): Adjust epilogue setup to use movhi_sp_r instead
+ of vanilla move.
+ As function body might contain CLI or SEI: Use irq_state 0 (IRQ
+ known to be off) only with TARGET_NO_INTERRUPTS. Never use
+ irq_state 1 (IRQ known to be on) here.
+
+2012-02-21 Bernd Schmidt <bernds@codesourcery.com>
+
+ * ira.c (check_allocation): Use REG_WORDS_BIG_ENDIAN, not
+ WORDS_BIG_ENDIAN.
+ * ira-color.c (setup_profitable_hard_regs, check_hard_reg_p,
+ assign_hard_reg): Likewise.
+
+2012-02-21 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md (neghi2): Remove "!d,0" alternative. Tweak "r,0".
+
+2012-02-21 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr.md
+ (*dec-and-branchhi!=-1.d.clobber): New text peephole.
+ (*dec-and-branchhi!=-1.l.clobber): New text peephole.
+
+2012-02-21 Georg-Johann Lay <avr@gjlay.de>
+
+ * config/avr/avr-protos.h (avr_accumulate_outgoing_args): Move
+ prototype from here to...
+ * config/avr/avr.h: ...here.
+
+2012-02-21 Richard Earnshaw <rearnsha@arm.com>
+
+ PR target/52294
+ * thumb2.md (thumb2_shiftsi3_short): Split register and
+ immediate shifts. For register shifts tie operands 0 and 1.
+ (peephole2 for above): Check that register-controlled shifts
+ have suitably tied operands.
+
+2012-02-21 Quentin Neill <quentin.neill@amd.com>
+
+ PR target/52137
+ * config/i386/bdver1.md (bdver1_call, bdver1_push,
+ bdver1_pop, bdver1_leave, bdver1_lea, bdver1_imul_DI, bdver1_imul,
+ bdver1_imul_mem_DI, bdver1_imul_mem, bdver1_idiv, bdver1_idiv_mem,
+ bdver1_str, bdver1_idirect, bdver1_ivector, bdver1_idirect_loadmov,
+ bdver1_idirect_load, bdver1_ivector_load, bdver1_idirect_movstore,
+ bdver1_idirect_both, bdver1_ivector_both, bdver1_idirect_store,
+ bdver1_ivector_store, bdver1_fldxf, bdver1_fld, bdver1_fstxf,
+ bdver1_fst, bdver1_fist, bdver1_fmov_bdver1, bdver1_fadd_load,
+ bdver1_fadd, bdver1_fmul_load, bdver1_fmul, bdver1_fsgn,
+ bdver1_fdiv_load, bdver1_fdiv, bdver1_fpspc_load, bdver1_fpspc,
+ bdver1_fcmov_load, bdver1_fcmov, bdver1_fcomi_load,
+ bdver1_fcomi, bdver1_fcom_load, bdver1_fcom,
+ bdver1_fxch, bdver1_ssevector_avx128_unaligned_load,
+ bdver1_ssevector_avx256_unaligned_load,
+ bdver1_ssevector_sse128_unaligned_load,
+ bdver1_ssevector_avx128_load, bdver1_ssevector_avx256_load,
+ bdver1_ssevector_sse128_load, bdver1_ssescalar_movq_load,
+ bdver1_ssescalar_vmovss_load, bdver1_ssescalar_sse128_load,
+ bdver1_mmxsse_load, bdver1_sse_store_avx256, bdver1_sse_store,
+ bdver1_mmxsse_store_short, bdver1_ssevector_avx256,
+ bdver1_movss_movsd, bdver1_mmxssemov, bdver1_sselog_load_256,
+ bdver1_sselog_256, bdver1_sselog_load, bdver1_sselog,
+ bdver1_ssecmp_load, bdver1_ssecmp, bdver1_ssecomi_load,
+ bdver1_ssecomi, bdver1_vcvtX2Y_avx256_load, bdver1_vcvtX2Y_avx256,
+ bdver1_ssecvt_cvtss2sd_load, bdver1_ssecvt_cvtss2sd,
+ bdver1_sseicvt_cvtsi2sd_load, bdver1_sseicvt_cvtsi2sd,
+ bdver1_ssecvt_cvtpd2ps_load, bdver1_ssecvt_cvtpd2ps,
+ bdver1_ssecvt_cvtdq2ps_load, bdver1_ssecvt_cvtdq2ps,
+ bdver1_ssecvt_cvtdq2pd_load, bdver1_ssecvt_cvtdq2pd,
+ bdver1_ssecvt_cvtps2pd_load, bdver1_ssecvt_cvtps2pd,
+ bdver1_ssecvt_cvtsX2si_load, bdver1_ssecvt_cvtsX2si,
+ bdver1_ssecvt_cvtpd2pi_load, bdver1_ssecvt_cvtpd2pi,
+ bdver1_ssecvt_cvtpd2dq_load, bdver1_ssecvt_cvtpd2dq,
+ bdver1_ssecvt_cvtps2pi_load, bdver1_ssecvt_cvtps2pi,
+ bdver1_ssemuladd_load_256, bdver1_ssemuladd_256,
+ bdver1_ssemuladd_load, bdver1_ssemuladd, bdver1_sseimul_load,
+ bdver1_sseimul, bdver1_sseiadd_load, bdver1_sseiadd,
+ bdver1_ssediv_double_load_256, bdver1_ssediv_double_256,
+ bdver1_ssediv_single_load_256, bdver1_ssediv_single_256,
+ bdver1_ssediv_double_load, bdver1_ssediv_double,
+ bdver1_ssediv_single_load, bdver1_ssediv_single, bdver1_sseins):
+ Add "bdver2" attribute.
+
+2012-02-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/s390/s390.c (s390_option_override): Make -mhard-dfp the
+ default if possible and not specified otherwise.
+
+2012-02-21 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/52314
+ * gimplify.c (create_tmp_from_val): Use the main variant type
+ for the type of the temporary we create.
+
+2012-02-21 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/52324
+ * gimplify.c (gimplify_expr): When re-gimplifying expressions
+ do not gimplify a MEM_REF address operand if it is already
+ in suitable form.
+
+2012-02-21 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * config/s390/s390.md ("fixuns_trunc<mode>si2"): Replace
+ TARGET_HARD_FLOAT with TARGET_HARD_DFP.
+
+2012-02-21 Richard Guenther <rguenther@suse.de>
+
+ * tree-vect-stmts.c (vectorizable_load): Use pre-computed
+ nested_in_vect_loop.
+
+2012-02-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/52318
+ * gimple-fold.c (gimplify_and_update_call_from_tree): Add
+ vdef also to non-pure/const call stmts in the sequence.
+
+2012-02-20 David S. Miller <davem@davemloft.net>
+
+ * config/sparc/sparc.md (load_pcrel_sym<P:mode>): Explain why we
+ don't use the "rd %pc" instruction on v9 for PIC register loads.
+
+2012-02-20 Aldy Hernandez <aldyh@redhat.com>
+
+ PR middle-end/52141
+ * trans-mem.c (ipa_tm_scan_irr_block): Error out on GIMPLE_ASM's
+ in a transaction safe function.
+
+2012-02-20 Kai Tietz <ktietz@redhat.com>
+
+ PR target/52238
+ * stor-layout.c (place_field): Handle desired_align for
+ ms-bitfields, too.
+
+2012-02-20 Richard Guenther <rguenther@suse.de>
+
+ PR tree-optimization/52298
+ * tree-vect-stmts.c (vectorizable_store): Properly use
+ STMT_VINFO_DR_STEP instead of DR_STEP when vectorizing
+ outer loops.
+ (vectorizable_load): Likewise.
+ * tree-vect-data-refs.c (vect_analyze_data_ref_access):
+ Access DR_STEP after ensuring it is not NULL.
+
+2012-02-20 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/52286
+ * fold-const.c (fold_binary_loc): For (X & C1) | C2
+ optimization use double_int_to_tree instead of build_int_cst_wide,
+ rewrite to use double_int vars.
+
+2012-02-20 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ PR target/50166
+ * acinclude.m4 (gcc_AC_INITFINI_ARRAY): Require gcc_SUN_LD_VERSION.
+ Define _start.
+ Remove -e 0 from $gcc_cv_ld invocation.
+ Only use __GLIBC_PREREQ if defined.
+ Enable on Solaris since Solaris 8 patch.
+ (gcc_SUN_LD_VERSION): New macro.
+ * configure.ac (ld_ver) <*-*-solaris2*>: Refer to
+ gcc_SUN_LD_VERSION for version number format.
+ * configure: Regenerate.
+ * varasm.c (get_elf_initfini_array_priority_section): Set
+ SECTION_NOTYPE for non-default priority.
+ Use get_section instead of get_unnamed_section to emit
+ .init_array/.fini_array with default priority.
+
+2012-02-19 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips_need_mips16_rdhwr_p): New variable.
+ (mips_get_tp): Set it. Record that __mips16_rdhwr binds locally.
+ (mips_start_unique_function, mips_output_mips16_rdhwr)
+ (mips_code_end): New functions.
+ (TARGET_ASM_CODE_END): Define.
+
+2012-02-19 Richard Sandiford <rdsandiford@googlemail.com>
+
+ * config/mips/mips.c (mips16_build_call_stub): Add CFI information
+ to stubs with non-sibling calls.
+
+2012-02-18 Sandra Loosemore <sandra@codesourcery.com>
+
+ * doc/invoke.texi (-fira-* options): Copy-edit.
+ (ira-* parameters): Copy-edit.
+
+2012-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ * doc/invoke.texi: Minor copy-edits to bring into conformance with
+ GCC coding conventions.
+
+2012-02-17 Sandra Loosemore <sandra@codesourcery.com>
+
+ * doc/invoke.texi: Consistently hyphenate "big-endian"/"little-endian"
+ when used as adjectives.
+
+2012-02-16 Sandra Loosemore <sandra@codesourcery.com>
+
+ * doc/invoke.texi: Clean up "that"/"which" confusion.
+
+2012-02-17 Steven Bosscher <steven@gcc.gnu.org>
+
+ * system.h: Poison SMALL_REGISTER_CLASSES
+ * config/rl78/rl78.h: Replace SMALL_REGISTER_CLASSES with hook.
+ * config/rx/rx.h: Remove SMALL_REGISTER_CLASSES.
+
+2012-02-16 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/52285
+ * tree-tailcall.c (find_tail_calls): Ignore gimple_clobber_p stmts
+ when deciding if a call is a tail call or tail recursion.
+
+2012-02-16 Kai Tietz <ktietz@redhat.com>
+
+ * config/i386/i386.c (legitimate_pic_address_disp_p): Allow
+ interger-constant displacement for UNSPEC_PCREL.
+
2012-02-16 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/52208
2012-02-14 Bernd Schmidt <bernds@codesourcery.com>
* haifa-sched.c (prune_ready_list): Ensure that if there is a
- sched-group insn, it either remains alone or the entire list is
- pruned.
+ sched-group insn, it either remains alone or the entire list is pruned.
2012-02-14 Jonathan Wakely <jwakely.gcc@gmail.com>
* gcc.c (LINK_COMMAND_SPEC): Deal with -fgnu-tm.
(GTM_SELF_SPECS): Define if not already defined.
(driver_self_specs): Add GTM_SELF_SPECS.
- * config/darwin.h (LINK_COMMAND_SPEC_A): Deal with -fgnu-tm.
- (GTM_SELF_SPECS): Define.
+ * config/darwin.h (LINK_COMMAND_SPEC_A): Deal with -fgnu-tm.
+ (GTM_SELF_SPECS): Define.
* config/i386/cygwin.h (GTM_SELF_SPECS): Likewise.
* config/i386/mingw32.h (GTM_SELF_SPECS): Likewise.
* cselib.c (expand_loc): Return sp, fp, hfp or cfa base reg right
away if seen.
- * cselib.c (dump_cselib_val): Don't assume l->setting_insn is
- non-NULL.
+ * cselib.c (dump_cselib_val): Don't assume l->setting_insn is non-NULL.
PR middle-end/52230
- * omp-low.c (expand_omp_for): If a static schedule without
- chunk size has NULL region->cont, force fd.chunk_size to be
- integer_zero_node.
+ * omp-low.c (expand_omp_for): If a static schedule without chunk size
+ has NULL region->cont, force fd.chunk_size to be integer_zero_node.
2012-02-13 Andrew MacLeod <amacleod@redhat.com>
disallow changes from SFmode to mode with different size in FP regs.
2012-02-12 Robert Millan <rmh@gnu.org>
- Gerald Pfeifer <gerald@pfeifer.com>
+ Gerald Pfeifer <gerald@pfeifer.com>
* ginclude/stddef.h [__FreeBSD_kernel__] (__size_t): Do not define.
Tweak comment.
2012-02-11 Jakub Jelinek <jakub@redhat.com>
PR debug/52132
- * reg-stack.c (subst_stack_regs_in_debug_insn): Don't use
- get_true_reg.
+ * reg-stack.c (subst_stack_regs_in_debug_insn): Don't use get_true_reg.
2012-02-11 Uros Bizjak <ubizjak@gmail.com>
* config/mips/mips-dspr2.md (mips_prepend): Mask operand 3 rather
than operand 2.
-2012-02-02 Jan Hubicka <jh@suse.cz>
- Tom de Vries <tom@codesourcery.com>
+2012-02-02 Jan Hubicka <jh@suse.cz>
+ Tom de Vries <tom@codesourcery.com>
PR middle-end/51998
* cgraphunit.c (cgraph_analyze_function): Break cyclic aliases.
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