+2012-09-05 Georg-Johann Lay <avr@gjlay.de>
+
+ Backport from 2012-09-05 mainline r190697.
+
+ PR target/54461
+ * config.gcc (tm_file,target=avr-*-*): Add avr/avrlibc.h if
+ configured --with-avrlibc.
+ (tm_defines,target=avr-*-*): Add WITH_AVRLIBC if configured
+ --with-avrlibc.
+ * config/avr/avrlibc.h: New file.
+ * config/avr/avr-c.c: Build-in define __WITH_AVRLIBC__ if
+ configured --with-avrlibc.
+ * doc/invoke.texi (AVR Built-in Macros): Document __WITH_AVRLIBC__
+
+2012-09-05 Bin Cheng <bin.cheng@arm.com>
+
+ Backport from 2012-09-04 mainline r190919
+
+ PR target/45070
+ * config/arm/arm.c (thumb1_extra_regs_pushed): Handle return value of size
+ less than 4 bytes by using macro ARM_NUM_INTS.
+ (thumb1_unexpanded_epilogue): Use macro ARM_NUM_INTS.
+
+2012-09-04 Richard Henderson <rth@redhat.com>
+
+ * alias.c (read_dependence): Return true for ALIAS_SET_MEMORY_BARRIER.
+
+2012-09-04 Georg-Johann Lay <avr@gjlay.de>
+
+ Backport from 2012-09-04 mainline r190920
+
+ PR target/54476
+ * config/avr/avr.c (avr_expand_delay_cycles): Mask operand with
+ SImode.
+
+2012-09-04 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
+
+ Backport from 2012-09-04 mainline r190914
+
+ PR target/54220
+ * config/avr/avr.c (TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS): New
+ define to...
+ (avr_allocate_stack_slots_for_args): ...this new static function.
+
+2012-09-03 H.J. Lu <hongjiu.lu@intel.com>
+
+ Backported from mainline
+ 2012-08-23 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR driver/54335
+ * doc/invoke.texi: Add -da and remove -dm.
+
+2012-09-03 Jakub Jelinek <jakub@redhat.com>
+
+ Backported from mainline
+ 2012-09-01 Jakub Jelinek <jakub@redhat.com>
+
+ PR target/54436
+ * config/i386/i386.md (*mov<mode>_insv_1_rex64, *movsi_insv_1): If
+ operands[1] is CONST_INT_P, convert it to QImode before printing.
+
+ 2012-08-31 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/54428
+ * c-convert.c (convert): Don't call fold_convert_loc if
+ TYPE_MAIN_VARIANT of a COMPLEX_TYPE is the same, unless e
+ is a COMPLEX_EXPR. Remove TYPE_MAIN_VARIANT check from
+ COMPLEX_TYPE -> COMPLEX_TYPE conversion.
+
+ 2012-08-24 Jakub Jelinek <jakub@redhat.com>
+
+ PR c/54363
+ * gimplify.c (optimize_compound_literals_in_ctor): Only recurse
+ if init is a CONSTRUCTOR.
+
+2012-09-02 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR rtl-optimization/54369
+ * config/mips/mips.c (mips_reorg): Invoke cleanup_barriers before
+ calling dbr_schedule.
+ * config/sparc/sparc.c (sparc_reorg): Likewise.
+
+2012-08-31 Kirill Yukhin <kirill.yukhin@intel.com>
+
+ Backport from mainline
+ 2012-08-23 Yuri Rumyantsev <ysrumyan@gmail.com>
+
+ * config/i386/i386.c (ia32_multipass_dfa_lookahead) : Add
+ case for Atom processor.
+
+2012-08-28 Uros Bizjak <ubizjak@gmail.com>
+
+ Backport from mainline
+ 2012-08-27 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/46254
+ * config/i386/predicates.md (cmpxchg8b_pic_memory_operand): Return
+ true for TARGET_64BIT or !flag_pic.
+ * config/i386/sync.md (*atomic_compare_and_swap_doubledi_pic): Remove.
+ (atomic_compare_and_swap_double<mode>): Change operand 2 predicate
+ to cmpxchg8b_pic_memory_operand. Use DWIH mode iterator.
+ Add insn constraint. Conditionally emit xchg asm insns.
+ (atomic_compare_and_swap<mode>): Update calls. Check only
+ cmpxchg8b_pic_memory_operand in memory address fixup.
+ (DCASMODE): Remove.
+ (CASHMODE): Rename from DCASHMODE.
+ (doublemodesuffix): Update modes.
+ (regprefix): New mode attribute.
+
+ (unspecv) <UNSPECV_CMPXCHG_{1,2,3,4}>: Remove.
+ <UNSPECV_CMPXCHG>: New constant.
+ (atomic_compare_and_swap<mode>_1): Rename from
+ atomic_compare_and_swap_single<mode>. Update calls and
+ unspec_volatile constants.
+ (atomic_compare_and_swap<mode>_doubleword): Rename from
+ atomic_compare_and_swap_double<mode>. Update calls and
+ unspec_volatile constants.
+
+2012-08-28 Walter Lee <walt@tilera.com>
+
+ Backport from mainline
+ 2012-08-28 Walter Lee <walt@tilera.com>
+
+ * confg/tilegx/tilegx.md: Fix code style.
+ (*zero_extendsidi_truncdisi): Fix typo.
+ * config/tilegx/tilegx.c: Fix code style.
+ (tilegx_function_profiler): Fix typo.
+
+2012-08-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline
+ 2012-08-27 Walter Lee <walt@tilera.com>
+
+ * doc/md.texi (TILE-Gx): Fix typo.
+
+2012-08-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline
+ 2012-08-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.c (tilegx_function_profiler): Fix typo.
+ * config/tilepro/tilepro.c (tilepro_function_profiler): Ditto.
+
+2012-08-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline
+ 2012-08-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/tilegx.md (*bfins): Rename to insn_bfins.
+ (insn_bfins): Delete.
+
+2012-08-27 Walter Lee <walt@tilera.com>
+
+ Backport from mainline
+ 2012-08-27 Walter Lee <walt@tilera.com>
+
+ * config/tilegx/sync.md (atomic_compare_and_swap_bare<mode>,
+ atomic_exchange_bare<mode>,
+ atomic_fetch_<fetchop_name>_bare<mode>): Set type to X1_remote.
+ * config/tilegx/tilegx-generic.md (X1_remote): New insn_reservation.
+ * config/tilegx/tilegx.md (type): Add X1_remove.
+ (insn_cmpexch<four_if_si>, insn_exch<four_if_si>,
+ insn_fetchadd<four_if_si>, insn_fetchaddgez<four_if_si>,
+ insn_fetchand<four_if_si>, insn_fetchor<four_if_si>): Set type to
+ X1_remote.
+
+2012-08-25 Eric Botcazou <ebotcazou@adacore.com>
+
+ PR rtl-optimization/54088
+ * jump.c (delete_related_insns): Robustify latest change.
+
+2012-08-21 Richard Guenther <rguenther@suse.de>
+
+ Backport from mainline
+ 2012-08-16 Richard Guenther <rguenther@suse.de>
+
+ PR middle-end/54146
+ * tree-ssa-loop-niter.c (find_loop_niter_by_eval): Free the
+ exit vector.
+ * ipa-pure-const.c (analyze_function): Use FOR_EACH_LOOP_BREAK.
+ * cfgloop.h (FOR_EACH_LOOP_BREAK): Fix.
+ * tree-ssa-structalias.c (handle_lhs_call): Properly free rhsc.
+ * tree-ssa-loop-im.c (analyze_memory_references): Adjust.
+ (tree_ssa_lim_finalize): Free all mem_refs.
+ * tree-ssa-sccvn.c (extract_and_process_scc_for_name): Free
+ scc when bailing out.
+ * modulo-sched.c (sms_schedule): Use FOR_EACH_LOOP_BREAK.
+ * ira-build.c (loop_with_complex_edge_p): Free loop exit vector.
+ * graphite-sese-to-poly.c (scop_ivs_can_be_represented): Use
+ FOR_EACH_LOOP_BREAK.
+
+ 2012-08-17 Richard Guenther <rguenther@suse.de>
+
+ * tree-sra.c (modify_function): Free redirect_callers vector.
+ * ipa-split.c (split_function): Free args_to_pass vector.
+ * tree-vect-stmts.c (vectorizable_operation): Do not pre-allocate
+ vec_oprnds.
+ (new_stmt_vec_info): Do not pre-allocate STMT_VINFO_SAME_ALIGN_REFS.
+ * tree-vect-slp.c (vect_free_slp_instance): Free the instance.
+ (vect_analyze_slp_instance): Free everything.
+ (destroy_bb_vec_info): Free the SLP instances.
+
+ 2012-08-17 Richard Guenther <rguenther@suse.de>
+
+ * params.def (integer-share-limit): Decrease from 256 to 251,
+ add rationale.
+
+ 2012-08-21 Richard Guenther <rguenther@suse.de>
+
+ * tree-ssa-loop-im.c (tree_ssa_lim_finalize): Properly free
+ the affine expansion cache.
+
+2012-08-20 Patrick Marlier <patrick.marlier@gmail.com>
+
+ Backported from trunk
+ 2012-08-20 Patrick Marlier <patrick.marlier@gmail.com>
+
+ PR middle-end/53992
+ * omp-low.c (lower_omp_1): Handle GIMPLE_TRANSACTION.
+
2012-08-20 Ramana Radhakrishnan <ramana.radhakrishnan@linaro.org>
Backport from mainline.
* config/tilegx/feedback.h: New file.
* config/tilepro/feedback.h: New file.
-2012-08-08
Pavel Chupin <pavel.v.chupin@intel.com>
+2012-08-08
Pavel Chupin <pavel.v.chupin@intel.com>
Backport from mainline r189840 and r187586:
2012-07-25 Sergey Melnikov <sergey.melnikov@intel.com>
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