+2009-07-26 Mikael Pettersson <mikpe@it.uu.se>
+
+ * arm.md (negdi2): Use DImode if forcing a value into a register.
+
+2009-07-26 Ira Rosen <irar@il.ibm.com>
+
+ PR tree-optimization/40801
+ * tree-vect-stmts.c (vectorizable_call): Get previous copy
+ of vector operand from the previous copy of vector statement.
+ Pass the correct definition type value to
+ vect_get_vec_def_for_stmt_copy().
+
+2009-07-25 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ * collect2.c (scan_libraries): Use CONST_CAST2 to perform char ** to
+ const char ** conversion.
+
+2009-07-25 David Daney <ddaney@caviumnetworks.com>
+
+ * system.h (gcc_assert): Invoke __builtin_unreachable() instead of
+ fancy_abort() if !ENABLE_ASSERT_CHECKING.
+ (gcc_unreachable): Invoke __builtin_unreachable() if
+ !ENABLE_ASSERT_CHECKING.
+
+2009-07-25 David Daney <ddaney@caviumnetworks.com>
+
+ PR rtl-optimization/40445
+ * emit-rtl.c (next_nonnote_insn_bb): New function.
+ * rtl.h (next_nonnote_insn_bb): Declare new function.
+ * cfgcleanup.c (try_optimize_cfg): Don't remove an empty block
+ with no successors that is the successor of the ENTRY_BLOCK.
+ Continue from the top after removing an empty fallthrough block.
+ * cfgrtl.c (get_last_bb_insn): Call next_nonnote_insn_bb instead
+ of next_nonnote_insn.
+
+2009-07-25 David Daney <ddaney@caviumnetworks.com>
+
+ * cfgcleanup.c (old_insns_match_p): Handle the case of empty
+ blocks.
+
+2009-07-25 Martin Jambor <mjambor@suse.cz>
+
+ * c-common.c (c_common_attribute_table): New element for noclone.
+ (handle_noclone_attribute): New function. Forward-declare.
+ * tree-inline.c (tree_versionable_function_p): Check for noclone
+ attribute.
+ * doc/extend.texi (Labels as Values): Document need for noclone.
+ (Function Attributes): Document noclone attribute.
+
+2009-07-25 Jakub Jelinek <jakub@redhat.com>
+
+ PR rtl-optimization/34999
+ * dwarf2out.c (struct dw_fde_struct): Add dw_fde_switch_cfi
+ and dw_fde_switched_cold_to_hot fields.
+ (output_cfi_p): New function.
+ (output_call_frame_info): If fde->dw_fde_switched_sections,
+ output 2 FDEs instead of one with corrupted header.
+ (dwarf2out_do_cfi_startproc): New function.
+ (dwarf2out_begin_prologue): Use it. Initialize fde->dw_fde_switch_cfi
+ and fde->dw_fde_switched_cold_to_hot.
+ (dwarf2out_switch_text_section): Compute
+ fde->dw_fde_switched_cold_to_hot. Switch to new text section here.
+ If dwarf2out_do_cfi_asm, emit .cfi_endproc before it and call
+ dwarf2out_do_cfi_startproc plus emit again currently active CFI insns.
+ Otherwise, compute fde->dw_fde_switch_cfi.
+
+2009-07-24 Cary Coutant <ccoutant@google.com>
+
+ * tree-cfg.c (assign_discriminator): Add explicit parentheses.
+
+2009-07-24 Cary Coutant <ccoutant@google.com>
+
+ * cfghooks.c (split_block): Copy discriminator to new block.
+ * tree-cfg.c (assign_discriminator): Check location of last
+ instruction in block as well as first.
+
+2009-07-24 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/linux.c: Use fputs or putc instead of fprintf
+ where appropriate.
+ * config/i386/gas.h: Ditto.
+ * config/i386/x86-64.h: Ditto.
+ * config/i386/att.h: Ditto.
+
+2009-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
+
+ * expmed.c (emit_store_flag): Use a recursive call to optimize the
+ xor case.
+
+2009-07-24 Martin Jambor <mjambor@suse.cz>
+
+ * ipa-prop.h (struct ipa_node_params): New flag node_enqued.
+ (ipa_push_func_to_list_1): Declare.
+ (ipa_push_func_to_list): New function.
+
+ * ipa-prop.c (ipa_push_func_to_list_1): New function.
+ (ipa_init_func_list): Call ipa_push_func_to_list_1.
+ (ipa_push_func_to_list): Removed.
+ (ipa_pop_func_from_list): Clear node_enqueued flag.
+
+2009-07-24 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * config/s390/s390.c (override_options): Default
+ max-unrolled-insns to 100 for z10 tuning.
+
+2009-07-24 Tobias Grosser <grosser@fim.uni-passau.de>
+
+ * Makefile.in (TREE_DATA_REF_H, tree-vrp.o, tree-cfg.o, tree-if-conv.o
+ tree-ssa-loop.o, tree-ssa-loop-niter.o, tree-ssa-loop-ivcanon.o,
+ tree-ssa-loop-prefetch.o, tree-predcom.o, tree-affine.o,
+ tree-scalar-evolution.o, tree-data-ref.o, tree-vect-loop.o,
+ tree-vect-data-refs.o, tree-loop-linear.o, tree-loop-distribution.o
+ tree-parloops.o, tree-pretty-printer.o, fold-const.o, tree-ssa-dce.o,
+ lambda-code.o, params.o): Cleanup use of SCEV_H and TREE_DATA_REF_H.
+
+2009-07-24 Kai Tietz <kai.tietz@onevision.com>
+
+ * config/i386/mingw-w64.h (STANDARD_INCLUDE_DIR): Remove and
+ use default set in mingw32.h header.
+ * config/i386/mingw32.h (STANDARD_INCLUDE_DIR): Use for 32-bit and
+ 64-bit /mingw/include path.
+ (STANDARD_STARTFILE_PREFIX_1): Use for 32-bit and 64-bit /mingw/lib
+ path.
+
+2009-07-23 Neil Vachharajani <nvachhar@google.com>
+
+ PR rtl-optimization/40209
+ * loop-iv.c (iv_analysis_loop_init): Call df_note_add_problem.
+
+2009-07-23 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c: Use ASM_LONG instead of .long. Concatenate
+ ASM_LONG, LPREFIX, MCOUNT_NAME and PROFILE_COUNT_REGISTER strings
+ with the rest of string where appropriate. Use fputs or putc
+ instead of fprintf where appropriate.
+
+2009-07-22 Michael Meissner <meissner@linux.vnet.ibm.com>
+ Pat Haugen <pthaugen@us.ibm.com>
+ Revital Eres <ERES@il.ibm.com>
+
+ * config/rs6000/vector.md: New file. Move most of the vector
+ expander support here from altivec.md to allow for the VSX vector
+ unit in the future. Add support for secondary_reload patterns.
+ Rewrite the patterns for vector comparison, and vector comparison
+ predicate instructions so that the RTL expresses the desired
+ behavior, instead of using unspec.
+
+ * config/rs6000/constraints.md ("f" constraint): Use
+ rs6000_constraints to hold the precalculated register class.
+ ("d" constraint): Ditto.
+ ("wd" constraint): New constraint for VSX.
+ ("wf" constraint): Ditto.
+ ("ws" constraint): Ditto.
+ ("wa" constraint): Ditto.
+ ("wZ" constraint): Ditto.
+ ("j" constraint): Ditto.
+
+ * config/rs6000/predicates.md (vsx_register_operand): New
+ predicate for VSX.
+ (vfloat_operand): New predicate for vector.md.
+ (vint_operand): Ditto.
+ (vlogical_operand): Ditto.
+ (easy_fp_constant): If VSX, 0.0 is an easy constant.
+ (easy_vector_constant): Add VSX support.
+ (altivec_indexed_or_indirect_operand): New predicate for
+ recognizing Altivec style memory references with AND -16.
+
+ * config/rs6000/rs6000.c (rs6000_vector_reload): New static global
+ for vector secondary reload support.
+ (rs6000_vector_reg_class): Delete, replacing it with
+ rs6000_constraints.
+ (rs6000_vsx_reg_class): Ditto.
+ (rs6000_constraints): New array to hold the register classes of
+ each of the register constraints that can vary at runtime.
+ (builtin_mode_to_type): New static array for builtin function type
+ creation.
+ (builtin_hash_table): New static hash table for builtin function
+ type creation.
+ (TARGET_SECONDARY_RELOAD): Define target hook.
+ (TARGET_IRA_COVER_CLASSES): Ditto.
+ (rs6000_hard_regno_nregs_internal): If -mvsx, floating point
+ registers are 128 bits if VSX memory reference instructions are used.
+ (rs6000_hard_regno_mode_ok): For VSX, only check if the VSX memory
+ unit is being used.
+ (rs6000_debug_vector_unit): Move into rs6000_debug_reg_global.
+ (rs6000_debug_reg_global): Move -mdebug=reg statements here.
+ Print several of the scheduling related parameters.
+ (rs6000_init_hard_regno_mode_ok): Switch to putting constraints in
+ rs6000_constraints instead of rs6000_vector_reg_class. Move
+ -mdebug=reg code to rs6000_debug_reg_global. Add support for
+ -mvsx-align-128 debug switch. Drop testing float_p if VSX or
+ Altivec. Add VSX support. Setup for secondary reload support on
+ Altivec/VSX registers.
+ (rs6000_override_options): Make power7 set the scheduling groups
+ like the power5. Add support for new debug switches to override
+ the scheduling defaults. Temporarily disable -mcpu=power7 from
+ setting -mvsx. Add support for debug switches -malways-hint,
+ -msched-groups, and -malign-branch-targets.
+ (rs6000_buitlin_conversion): Add support for returning unsigned
+ vector conversion functions to fix regressions due to stricter
+ type checking.
+ (rs6000_builtin_mul_widen_even): Ditto.
+ (rs6000_builtin_mul_widen_odd): Ditto.
+ (rs6000_builtin_vec_perm): Ditto.
+ (rs6000_vec_const_move): On VSX, use xxlxor to clear register.
+ (rs6000_expand_vector_init): Initial VSX support for using xxlxor
+ to zero a register.
+ (rs6000_emit_move): Fixup invalid const symbol_ref+reg that is
+ generated upstream.
+ (bdesc_3arg): Add builtins for unsigned types. Add builtins for
+ VSX types for bit operations. Changes to accomidate vector.md.
+ (bdesc_2arg): Ditto.
+ (bdesc_1arg): Ditto.
+ (struct builtin_description_predicates): Rewrite predicate
+ handling so that RTL describes the operation, instead of passing
+ the instruction to be used as a string argument.
+ (bdesc_altivec_preds): Ditto.
+ (altivec_expand_predicate_builtin): Ditto.
+ (altivec_expand_builtin): Ditto.
+ (rs6000_expand_ternop_builtin): Use a switch instead of an if
+ statement for vsldoi support.
+ (altivec_expand_ld_builtin): Change to use new names from vector.md.
+ (altivec_expand_st_builtin): Ditto.
+ (paired_expand_builtin): Whitespace changes.
+ (rs6000_init_builtins): Add V2DF/V2DI types. Initialize the
+ builtin_mode_to_type table for secondary reload. Call
+ builtin_function_type to build random builtin functions.
+ (altivec_init_builtins): Change to use builtin_function_type to
+ create builtin function types dynamically as we need them.
+ (builtin_hash_function): New support for hashing the tree types
+ for builtin function as we need it, rather than trying to build
+ all of the trees that we need. Add initial preliminary VSX support.
+ (builtin_function_type): Ditto.
+ (builtin_function_eq): Ditto.
+ (builtin_hash_struct): Ditto.
+ (rs6000_init_builtins): Ditto.
+ (rs6000_common_init_builtins): Ditto.
+ (altivec_init_builtins): Ditto.
+ (rs6000_common_init_builtins): Ditto.
+ (enum reload_reg_type): New enum for simplifing reg classes.
+ (rs6000_reload_register_type): Simplify register classes into GPR,
+ Vector, and other registers. Altivec and VSX addresses in reload.
+ (rs6000_secondary_reload_inner): Ditto.
+ (rs6000_ira_cover_classes): New target hook, that returns the
+ appropriate cover classes, based on -mvsx being used or not.
+ (rs6000_secondary_reload_class): Add VSX support.
+ (get_vec_cmp_insn): Delete, rewrite vector conditionals.
+ (get_vsel_insn): Ditto.
+ (rs6000_emit_vector_compare): Rewrite vector conditional support
+ so that where we can, we use RTL operators, instead of blindly use
+ UNSPEC.
+ (rs6000_emit_vector_select): Ditto.
+ (rs6000_emit_vector_cond_expr): Ditto.
+ (rs6000_emit_minmax): Directly generate min/max under altivec, vsx.
+ (create_TOC_reference): Add -mdebug=addr support.
+ (emit_frame_save): VSX loads/stores need register indexed addressing.
+
+ * config/rs6000/rs6000.md: Include vector.md.
+
+ * config/rs6000/t-rs6000 (MD_INCLUDES): Add vector.md.
+
+ * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add
+ support for V2DI, V2DF in logical, permute, select operations.
+
+ * config/rs6000/rs6000.opt (-mvsx-scalar-double): Add new debug
+ switch for vsx/power7.
+ (-mvsx-scalar-memory): Ditto.
+ (-mvsx-align-128): Ditto.
+ (-mallow-movmisalign): Ditto.
+ (-mallow-df-permute): Ditto.
+ (-msched-groups): Ditto.
+ (-malways-hint): Ditto.
+ (-malign-branch-targets): Ditto.
+
+ * config/rs6000/rs6000.h (IRA_COVER_CLASSES): Delete, use target
+ hook instead.
+ (IRA_COVER_CLASSES_PRE_VSX): Cover classes if not -mvsx.
+ (IRA_COVER_CLASSES_VSX): Cover classes if -mvsx.
+ (rs6000_vector_reg_class): Delete.
+ (rs6000_vsx_reg_class): Ditto.
+ (enum rs6000_reg_class_enum): New enum for the constraints that
+ vary based on target switches.
+ (rs6000_constraints): New array to hold the register class for all
+ of the register constraints that vary based on the switches used.
+ (ALTIVEC_BUILTIN_*_UNS): Add unsigned builtin functions.
+ (enum rs6000_builtins): Add unsigned varients for the builtin
+ declarations returned by target hooks for expanding multiplies,
+ select, and permute operations. Add VSX builtins.
+ (enum rs6000_builtin_type_index): Add entries for VSX.
+ (V2DI_type_node): Ditto.
+ (V2DF_type_node): Ditto.
+ (unsigned_V2DI_type_node): Ditto.
+ (bool_long_type_node): Ditto.
+ (intDI_type_internal_node): Ditto.
+ (uintDI_type_internal_node): Ditto.
+ (double_type_internal_node): Ditto.
+
+ * config/rs6000/altivec.md (whole file): Move all expanders to
+ vector.md from altivec.md. Rename insn matching functions to be
+ altivec_foo.
+ (UNSPEC_VCMP*): Delete, rewrite vector comparisons.
+ (altivec_vcmp*): Ditto.
+ (UNSPEC_VPERM_UNS): New, add for unsigned types using vperm.
+ (VM): New iterator for moves that includes the VSX types.
+ (altivec_vperm_<mode>): Add VSX types. Add unsigned types.
+ (altivec_vperm_<mode>_uns): New, for unsigned types.
+ (altivec_vsel_*): Rewrite vector comparisons and predicate builtins.
+ (altivec_eq<mode>): Ditto.
+ (altivec_gt<mode>): Ditto.
+ (altivec_gtu<mode>): Ditto.
+ (altivec_eqv4sf): Ditto.
+ (altivec_gev4sf): Ditto.
+ (altivec_gtv4sf): Ditto.
+ (altivec_vcmpbfp_p): Ditto.
+
+2009-07-23 Richard Earnshaw <rearnsha@arm.com>
+
+ * arm.md (split for ior/xor with shift and zero-extend): Cast op3 to
+ unsigned HWI.
+
+2009-07-23 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/40832
+ * config/i386/i386.c (output_387_ffreep): Rewrite to use
+ ASM_SHORT instead of .word.
+ * config/i386/i386.md (*tls_global_dynamic_64): Use ASM_SHORT
+ instead of .word in asm template.
+
+2009-07-22 Vladimir Makarov <vmakarov@redhat.com>
+
+ PR target/37488
+ * ira-lives.c (bb_has_abnormal_call_pred): New function.
+ (process_bb_node_lives): Use it.
+
+ * ira.c (setup_cover_and_important_classes): Don't setup
+ ira_important_class_nums. Add cover classes to the end of
+ important classes.
+ (cover_class_order, comp_reg_classes_func, reorder_important_classes):
+ New.
+ (find_reg_class_closure): Use reorder_important_classes.
+
+ * config/i386/i386.h (IRA_COVER_CLASSES): Remove.
+
+ * config/i386/i386.c (i386_ira_cover_classes): New function.
+ (TARGET_IRA_COVER_CLASSES): Redefine.
+
+ * doc/tm.texi (TARGET_IRA_COVER_CLASSES): Add a comment about
+ importance of order of cover classes in the array.
+
+2009-07-22 Diego Novillo <dnovillo@google.com>
+
+ * tree-pass.h (TDF_EH): Define.
+ * gimple-pretty-print.c (dump_gimple_stmt): If FLAGS
+ contains TDF_EH, print the EH region number holding GS.
+ * tree-dump.c (dump_options): Add "eh".
+ * doc/invoke.texi: Document it.
+
+2009-07-22 Doug Kwan <dougkwan@google.com>
+
+ * config/arm/arm.md (subdi3) Copy non-reg values to DImode registers.
+
+2009-07-22 Michael Matz <matz@suse.de>
+
+ PR tree-optimization/35229
+ PR tree-optimization/39300
+
+ * tree-ssa-pre.c (includes): Include tree-scalar-evolution.h.
+ (inhibit_phi_insertion): New function.
+ (insert_into_preds_of_block): Call it for REFERENCEs.
+ (init_pre): Initialize and finalize scalar evolutions.
+ * Makefile.in (tree-ssa-pre.o): Depend on tree-scalar-evolution.h .
+
+2009-07-22 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/predicates.md (zero_extended_scalar_load_operand):
+ Use CONST_VECTOR_NUNITS to determine number of elements.
+
+2009-07-22 Andreas Krebbel <krebbel1@de.ibm.com>
+
+ * config/s390/constraints.md (ZQ, ZR, ZS, ZT): New constraints.
+ (U, W): Constraints are now deprecated and will be removed if we
+ run out of letters.
+ * config/s390/s390.md (U, W): Replaced with ZQZR, ZSZT throughout
+ the file.
+ ("prefetch"): Add the stcmh instruction for prefetching.
+ * config/s390/s390.c (s390_symref_operand_p): Function moved. No
+ changes.
+ (s390_short_displacement): Return always true if compiling for
+ machines not providing the long displacement facility.
+ (s390_mem_constraint): Support the new constraint letter Z.
+ (s390_check_qrst_address): New function.
+
+2009-07-21 DJ Delorie <dj@redhat.com>
+
+ * config/mep/mep.c (mep_legitimize_arg): Leave control registers
+ alone too.
+
+2009-07-21 Jason Merrill <jason@redhat.com>
+
+ * c-common.c (max_tinst_depth): Increase default to 1024.
+
+2009-07-21 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/sse.md (vec_unpacku_float_hi_v4si): New expander.
+ (vec_unpacku_float_lo_v4si): Ditto.
+
+2009-07-21 Uros Bizjak <ubizjak@gmail.com>
+
+ PR target/40811
+ * config/i386/sse.md (sse2_cvtudq2ps): New expander.
+ (enum ix86_builtins): Add IX86_BUILTIN_CVTUDQ2PS.
+ (builtin_description): Add __builtin_ia32_cvtudq2ps.
+ (ix86_vectorize_builtin_conversion): Handle IX86_BUILTIN_CVTUDQ2PS.
+
+2009-07-21 Jakub Jelinek <jakub@redhat.com>
+
+ PR tree-optimization/40813
+ * tree-inline.c (copy_bb): Regimplify RHS after last stmt, not before
+ it.
+
+2009-07-21 Kaz Kojima <kkojima@gcc.gnu.org>
+
+ * config/sh/sh.c (sh_gimplify_va_arg_expr): Wrap the result
+ with a NOP_EXPR if needed.
+
+2009-07-21 Paul Brook <paul@codesourcery.com>
+
+ * tree-vectorizer.c (increase_alignment): Handle nested arrays.
+ Terminate debug dump with newline.
+
+2009-07-20 John David Anglin <dave.anglin@nrc-cnrc.gc.ca>
+
+ * pa.c (compute_zdepwi_operands): Limit deposit length to 32 - lsb.
+ Cast "1" to unsigned HOST_WIDE_INT.
+ (compute_zdepdi_operands): Limit maximum length to 64 bits. Limit
+ deposit length to the maximum length - lsb. Extend length if
+ HOST_BITS_PER_WIDE_INT is 32.
+
+2009-07-20 Olatunji Ruwase <tjruwase@google.com>
+
+ * cgraph.h (constant_pool_htab): New function.
+ (constant_descriptor_tree): Move from varasm.c.
+ * varasm.c (constant_pool_htab): New function.
+ (constant_descriptor_tree): Move to cgraph.h.
+
+2009-07-20 Olatunji Ruwase <tjruwase@google.com>
+
+ * toplev.c: Invoke FINISH_UNIT callbacks before call to finalize().
+
+2009-07-20 Shujing Zhao <pearly.zhao@oracle.com>
+
+ * Makefile.in (TREE_INLINE_H, tree-inline.o, cgraph.o): Remove
+ $(VARRAY_H).
+
+2009-07-20 Xinliang David Li <davidxl@google.com>
+
+ * dbgcnt.c (dbg_cnt_set_limit_by_name): Add length check.
+
+2009-07-20 Adam Nemet <anemet@caviumnetworks.com>
+
+ * config/mips/mips.md (move_type): Add arith.
+ (type): Handle arith.
+ (zero_extendsidi2): Rename this into ...
+ (*zero_extendsidi2): ... this. Don't match if ISA_HAS_EXT_INS.
+ (zero_extendsidi2): New expander.
+ (*zero_extendsidi2_dext): New pattern.
+
+2009-07-20 Nick Clifton <nickc@redhat.com>
+
+ * config.gcc (mips64-*-*): Add definition of tm_defines in order
+ to set MIPS_ABI_DEFAULT.
+ * config/mips/vr.h (MIPS_ABI_DEFAULT): Remove definition.
+
+2009-07-20 Jakub Jelinek <jakub@redhat.com>
+
+ * tree-object-size.c (addr_object_size): Handle unions with
+ array in it as last field of structs in __bos (, 1) as __bos (, 0).
+
+ PR tree-optimization/40792
+ * tree.c (build_function_type_skip_args): Remove bogus assert.
+
+2009-07-20 Jan Hubicka <jh@suse.cz>
+ Martin Jambor <mjambor@suse.cz>
+
+ * cgraph.h (combined_args_to_skip): New field.
+ * cgraph.c (cgraph_create_virtual_clone): Properly handle
+ combined_args_to_skip and args_to_skip.
+ * tree-inline.c (update_clone_info): New function.
+ (tree_function_versioning): Call update_clone_info.
+ * cgraphunit.c: (cgraph_materialize_clone): Dump materialized
+ functions.
+ (cgraph_materialize_all_clones): More extensive dumping, working
+ with combined_args_to_skip rather than args_to_skip.
+
+2009-07-20 Ira Rosen <irar@il.ibm.com>
+
+ * tree-vectorizer.h (vectorizable_condition): Add parameters.
+ * tree-vect-loop.c (vect_is_simple_reduction): Support COND_EXPR.
+ (get_initial_def_for_reduction): Likewise.
+ (vectorizable_reduction): Skip the check of first operand in case
+ of COND_EXPR. Add check that it is outer loop vectorization if
+ nested cycle was detected. Call vectorizable_condition() for
+ COND_EXPR. If reduction epilogue cannot be created do not fail for
+ nested cycles (if it is not double reduction). Assert that there
+ is only one type in the loop in case of COND_EXPR. Call
+ vectorizable_condition() to vectorize COND_EXPR.
+ * tree-vect-stmts.c (vectorizable_condition): Update comment.
+ Add parameters. Allow nested cycles if called from
+ vectorizable_reduction(). Use reduction vector variable if provided.
+ (vect_analyze_stmt): Call vectorizable_reduction() before
+ vectorizable_condition().
+ (vect_transform_stmt): Update call to vectorizable_condition().
+
2009-07-20 Christian Bruel <christian.bruel@st.com>
* config/sh/sh.opt (-mfmovd): Resurrect and document.
alias information when not optimizing.
2009-07-14 Richard Guenther <rguenther@suse.de>
- Andrey Belevantsev <abel@ispras.ru>
+
Andrey Belevantsev <abel@ispras.ru>
* tree-ssa-alias.h (refs_may_alias_p_1): Declare.
(pt_solution_set): Likewise.
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