+1999-12-07 Jakub Jelinek <jakub@redhat.com>
+
+ * config/sparc/sparc.c (hard_32bit_mode_classes): Mark registers
+ suitable for holding OFmode values so that gcc works with complex
+ quad long doubles.
+ (hard_64bit_mode_classes): Likewise.
+
+ * config/sparc/sparc.md (sethi_di_medlow_embmedany_pic): Fix pattern
+ so that it is actually matched.
+ (sethi_di_medlow): Likewise.
+
+ * config/sparc/sparc.h (LEGITIMATE_CONSTANT_P): Consider TFmode 0.0L
+ as legitimate constant if -mvis.
+ * config/sparc/sparc.md (movtf): Likewise.
+ (clear_sf): Use const_double_operand.
+ (clear_sfp, clear_dfp, clear_tf, clear_tfp): New patterns.
+
+ * config/sparc/sparc.c (sparc_emit_float_lib_cmp): New function.
+ * config/sparc/sparc-protos.h (sparc_emit_float_lib_cmp): Prototype.
+ * config/sparc/sparc.h (*_LIBCALL): Only use for _Q_*
+ routines, _Qp_* cannot be handled like that now.
+ (INIT_TARGET_OPTABS): Likewise.
+ * config/sparc/sparc.md (cmptf): Accept soft float ARCH64.
+ (seq, sne, sgt, sge, slt, sle, beq, bne, bgt, bge, blt, ble): Call
+ sparc_emit_float_lib_cmp if ARCH64 and soft float.
+ (extendsftf2, extenddftf2, trunctfsf2, trunctfdf2, floatsitf2,
+ floatditf2, fix_trunctfsi2, fix_trunctfdi2, addtf3, subtf3, multf3,
+ divtf3, sqrttf3): New expanders.
+ (extendsftf2_hq, extenddftf2_hq, trunctfsf2_hq, trunctfdf2_hq,
+ floatsitf2_hq, floatditf2_hq, fix_trunctfsi2_hq, fix_trunctfdi2_hq,
+ addtf3_hq, subtf3_hq, multf3_hq, divtf3_hq, sqrttf3_hq): Rename from
+ non-_hq patterns.
+
+ * configure.in (sparc64-*-linux*): Use posix threads if enabled.
+ * configure: Rebuilt.
+ * config/sparc/linux64.h: Default to -mcpu=ultrasparc if no
+ -mcpu is given and we're doing 64bit compiles.
+
+Tue Dec 7 19:22:06 1999 Richard Henderson <rth@cygnus.com>
+
+ * loop.h (struct induction): Add multi_insn_incr.
+ * loop.c (basic_induction_var): New multi_insn_incr argument.
+ Set it if we search back through previous insns for the biv.
+ (record_biv): New multi_insn_incr argument; fill in struct induction.
+ (strength_reduce): Discard an iv with multiple bivs, any of
+ which require multiple insns to increment.
+
+1999-12-07 Martin v. Löwis <loewis@informatik.hu-berlin.de>
+
+ * invoke.texi (C Dialect Options): Remove -flang-c9x, add -std
+ documentation.
+
+1999-12-06 David S. Miller <davem@redhat.com>
+
+ * combine.c (check_promoted_subreg): Do not conditionalize this upon
+ PROMOTE_FUNCTION_RETURN.
+
+Mon Dec 6 15:12:14 1999 Jim Wilson <wilson@cygnus.com>
+
+ * regmove.c (optimize_reg_copy_1): If no REG_DEAD note, check for
+ and handle REG_UNUSED note on insn.
+
+ * combine.c (force_to_mode, case LSHIFTRT): New local inner_mask. Set
+ inner_mask instead of mask.
+
1999-12-06 Brendan Kehoe <brendan@cygnus.com>
* dwarf2out.c (field_byte_offset): As with dwarfout.c, size can be
always use move_by_pieces to avoid infinite recursion.
(restore_fixed_argument_area): Likewise.
+ * combine.c (check_promoted_subreg, record_promoted_value): New
+ functions.
+ (combine_instructions): Use them to retain nonzero and sign bit
+ information after SUBREGs are eliminated by optimizations in
+ this pass if PROMOTE_FUNCTION_RETURN.
+
+ * config/sparc/sparc.h (ASM_DECLARE_REGISTER_GLOBAL): Document
+ .register declaration. Don't use variables with __ prefixes.
+
Mon Dec 6 12:24:52 1999 Richard Kenner <kenner@vlsi1.ultra.nyu.edu>
* fold-const.c (optimize_bit_field_compare): Only use one mode
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