* configure.ac (HAVE_AS_IX86_REP_LOCK_PREFIX): New test.
* configure: Regenerate.
* config.in: Regenerate.
* config/i386/i386.c (print_operand) <case ;>: Also print ; if
!HAVE_AS_IX86_REP_LOCK_PREFIX.
Don't emit whitespace.
* config/i386/i386.md (*rep_movdi_rex64): Use {%;} after rep.
(*rep_movsi): Likewise.
(*rep_movsi_rex64): Likewise.
(*rep_movqi): Likewise.
(*rep_movqi_rex64): Likewise.
(*rep_stosdi_rex64): Likewise.
(*rep_stossi): Likewise.
(*rep_stossi_rex64): Likewise.
(*rep_stosqi): Likewise.
(*rep_stosqi_rex64): Likewise.
(*cmpstrnqi_nz_1): Use {%;} after repz.
(*cmpstrnqi_nz_rex_1): Likewise.
(*cmpstrnqi_1): Likewise.
(*cmpstrnqi_rex_1): Likewise.
(*strlenqi_1): Use {%;} after repnz.
(*strlenqi_rex_1): Likewise.
* config/i386/sync.md (memory_barrier_nosse): Replace {%;| } by {%;} .
(*sync_compare_and_swap<mode>): Likewise.
(sync_double_compare_and_swap<mode>): Likewise.
(*sync_double_compare_and_swapdi_pic): Likewise.
(sync_old_add<mode>): Likewise.
(sync_add<mode>): Likewise.
(sync_sub<mode>): Likewise.
(sync_<code><mode>): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@159512
138bc75d-0d04-0410-961f-
82ee72b054a4
+2010-05-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
+
+ PR target/44074
+ * configure.ac (HAVE_AS_IX86_REP_LOCK_PREFIX): New test.
+ * configure: Regenerate.
+ * config.in: Regenerate.
+ * config/i386/i386.c (print_operand) <case ;>: Also print ; if
+ !HAVE_AS_IX86_REP_LOCK_PREFIX.
+ Don't emit whitespace.
+ * config/i386/i386.md (*rep_movdi_rex64): Use {%;} after rep.
+ (*rep_movsi): Likewise.
+ (*rep_movsi_rex64): Likewise.
+ (*rep_movqi): Likewise.
+ (*rep_movqi_rex64): Likewise.
+ (*rep_stosdi_rex64): Likewise.
+ (*rep_stossi): Likewise.
+ (*rep_stossi_rex64): Likewise.
+ (*rep_stosqi): Likewise.
+ (*rep_stosqi_rex64): Likewise.
+ (*cmpstrnqi_nz_1): Use {%;} after repz.
+ (*cmpstrnqi_nz_rex_1): Likewise.
+ (*cmpstrnqi_1): Likewise.
+ (*cmpstrnqi_rex_1): Likewise.
+ (*strlenqi_1): Use {%;} after repnz.
+ (*strlenqi_rex_1): Likewise.
+ * config/i386/sync.md (memory_barrier_nosse): Replace {%;| } by {%;} .
+ (*sync_compare_and_swap<mode>): Likewise.
+ (sync_double_compare_and_swap<mode>): Likewise.
+ (*sync_double_compare_and_swapdi_pic): Likewise.
+ (sync_old_add<mode>): Likewise.
+ (sync_add<mode>): Likewise.
+ (sync_sub<mode>): Likewise.
+ (sync_<code><mode>): Likewise.
+
2010-05-17 Martin Jambor <mjambor@suse.cz>
* cgraph.h (cgraph_indirect_call_info): New fields anc_offset,
#endif
+/* Define true if the assembler supports 'rep <insn>, lock <insn>'. */
+#ifndef USED_FOR_TARGET
+#undef HAVE_AS_IX86_REP_LOCK_PREFIX
+#endif
+
+
/* Define if your assembler supports the sahf mnemonic. */
#ifndef USED_FOR_TARGET
#undef HAVE_AS_IX86_SAHF
return;
case ';':
-#if TARGET_MACHO
- fputs (" ; ", file);
-#else
- putc (' ', file);
+#if TARGET_MACHO || !HAVE_AS_IX86_REP_LOCK_PREFIX
+ fputs (";", file);
#endif
return;
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
- "rep movsq"
+ "rep{%;} movsq"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"!TARGET_64BIT"
- "rep movs{l|d}"
+ "rep{%;} movs{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
- "rep movs{l|d}"
+ "rep{%;} movs{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"!TARGET_64BIT"
- "rep movsb"
+ "rep{%;} movsb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(mem:BLK (match_dup 4)))
(use (match_dup 5))]
"TARGET_64BIT"
- "rep movsb"
+ "rep{%;} movsb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "both")
(use (match_operand:DI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
- "rep stosq"
+ "rep{%;} stosq"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(use (match_operand:SI 2 "register_operand" "a"))
(use (match_dup 4))]
"!TARGET_64BIT"
- "rep stos{l|d}"
+ "rep{%;} stos{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(use (match_operand:SI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
- "rep stos{l|d}"
+ "rep{%;} stos{l|d}"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(use (match_operand:QI 2 "register_operand" "a"))
(use (match_dup 4))]
"!TARGET_64BIT"
- "rep stosb"
+ "rep{%;} stosb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(use (match_operand:QI 2 "register_operand" "a"))
(use (match_dup 4))]
"TARGET_64BIT"
- "rep stosb"
+ "rep{%;} stosb"
[(set_attr "type" "str")
(set_attr "prefix_rep" "1")
(set_attr "memory" "store")
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (match_operand:SI 2 "register_operand" "=c"))]
"!TARGET_64BIT"
- "repz cmpsb"
+ "repz{%;} cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (match_operand:DI 2 "register_operand" "=c"))]
"TARGET_64BIT"
- "repz cmpsb"
+ "repz{%;} cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rex" "0")
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (match_operand:SI 2 "register_operand" "=c"))]
"!TARGET_64BIT"
- "repz cmpsb"
+ "repz{%;} cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (match_operand:DI 2 "register_operand" "=c"))]
"TARGET_64BIT"
- "repz cmpsb"
+ "repz{%;} cmpsb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rex" "0")
(clobber (match_operand:SI 1 "register_operand" "=D"))
(clobber (reg:CC FLAGS_REG))]
"!TARGET_64BIT"
- "repnz scasb"
+ "repnz{%;} scasb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rep" "1")])
(clobber (match_operand:DI 1 "register_operand" "=D"))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT"
- "repnz scasb"
+ "repnz{%;} scasb"
[(set_attr "type" "str")
(set_attr "mode" "QI")
(set_attr "prefix_rex" "0")
;; GCC machine description for i386 synchronization instructions.
-;; Copyright (C) 2005, 2006, 2007, 2008, 2009
+;; Copyright (C) 2005, 2006, 2007, 2008, 2009, 2010
;; Free Software Foundation, Inc.
;;
;; This file is part of GCC.
(unspec:BLK [(match_dup 0)] UNSPEC_MFENCE))
(clobber (reg:CC FLAGS_REG))]
"!(TARGET_64BIT || TARGET_SSE2)"
- "lock{%;| }or{l}\t{$0, (%%esp)|DWORD PTR [esp], 0}"
+ "lock{%;} or{l}\t{$0, (%%esp)|DWORD PTR [esp], 0}"
[(set_attr "memory" "unknown")])
;; ??? It would be possible to use cmpxchg8b on pentium for DImode
[(match_dup 1) (match_dup 2) (match_dup 3)] UNSPECV_CMPXCHG)
(match_dup 2)))]
"TARGET_CMPXCHG"
- "lock{%;| }cmpxchg{<imodesuffix>}\t{%3, %1|%1, %3}")
+ "lock{%;} cmpxchg{<imodesuffix>}\t{%3, %1|%1, %3}")
(define_insn "sync_double_compare_and_swap<mode>"
[(set (match_operand:DCASMODE 0 "register_operand" "=A")
UNSPECV_CMPXCHG)
(match_dup 2)))]
""
- "lock{%;| }cmpxchg<doublemodesuffix>b\t%1")
+ "lock{%;} cmpxchg<doublemodesuffix>b\t%1")
;; Theoretically we'd like to use constraint "r" (any reg) for operand
;; 3, but that includes ecx. If operand 3 and 4 are the same (like when
UNSPECV_CMPXCHG)
(match_dup 2)))]
"!TARGET_64BIT && TARGET_CMPXCHG8B && flag_pic"
- "xchg{l}\t%%ebx, %3\;lock{%;| }cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
+ "xchg{l}\t%%ebx, %3\;lock{%;} cmpxchg8b\t%1\;xchg{l}\t%%ebx, %3")
(define_insn "sync_old_add<mode>"
[(set (match_operand:SWI 0 "register_operand" "=<r>")
(match_operand:SWI 2 "register_operand" "0")))
(clobber (reg:CC FLAGS_REG))]
"TARGET_XADD"
- "lock{%;| }xadd{<imodesuffix>}\t{%0, %1|%1, %0}")
+ "lock{%;} xadd{<imodesuffix>}\t{%0, %1|%1, %0}")
;; Recall that xchg implicitly sets LOCK#, so adding it again wastes space.
(define_insn "sync_lock_test_and_set<mode>"
if (TARGET_USE_INCDEC)
{
if (operands[1] == const1_rtx)
- return "lock{%;| }inc{<imodesuffix>}\t%0";
+ return "lock{%;} inc{<imodesuffix>}\t%0";
if (operands[1] == constm1_rtx)
- return "lock{%;| }dec{<imodesuffix>}\t%0";
+ return "lock{%;} dec{<imodesuffix>}\t%0";
}
if (x86_maybe_negate_const_int (&operands[1], <MODE>mode))
- return "lock{%;| }sub{<imodesuffix>}\t{%1, %0|%0, %1}";
+ return "lock{%;} sub{<imodesuffix>}\t{%1, %0|%0, %1}";
- return "lock{%;| }add{<imodesuffix>}\t{%1, %0|%0, %1}";
+ return "lock{%;} add{<imodesuffix>}\t{%1, %0|%0, %1}";
})
(define_insn "sync_sub<mode>"
if (TARGET_USE_INCDEC)
{
if (operands[1] == const1_rtx)
- return "lock{%;| }dec{<imodesuffix>}\t%0";
+ return "lock{%;} dec{<imodesuffix>}\t%0";
if (operands[1] == constm1_rtx)
- return "lock{%;| }inc{<imodesuffix>}\t%0";
+ return "lock{%;} inc{<imodesuffix>}\t%0";
}
- return "lock{%;| }sub{<imodesuffix>}\t{%1, %0|%0, %1}";
+ return "lock{%;} sub{<imodesuffix>}\t{%1, %0|%0, %1}";
})
(define_insn "sync_<code><mode>"
UNSPECV_LOCK))
(clobber (reg:CC FLAGS_REG))]
""
- "lock{%;| }<logic>{<imodesuffix>}\t{%1, %0|%0, %1}")
+ "lock{%;} <logic>{<imodesuffix>}\t{%1, %0|%0, %1}")
fi
- # This one is used unconditionally by i386.[ch]; it is to be defined
+ # These two are used unconditionally by i386.[ch]; it is to be defined
# to 1 if the feature is present, 0 otherwise.
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for GOTOFF in data" >&5
$as_echo_n "checking assembler for GOTOFF in data... " >&6; }
#define HAVE_AS_GOTOFF_IN_DATA `if test $gcc_cv_as_ix86_gotoff_in_data = yes; then echo 1; else echo 0; fi`
_ACEOF
+
+ { $as_echo "$as_me:${as_lineno-$LINENO}: checking assembler for rep and lock prefix" >&5
+$as_echo_n "checking assembler for rep and lock prefix... " >&6; }
+if test "${gcc_cv_as_ix86_rep_lock_prefix+set}" = set; then :
+ $as_echo_n "(cached) " >&6
+else
+ gcc_cv_as_ix86_rep_lock_prefix=no
+ if test x$gcc_cv_as != x; then
+ echo 'rep movsl
+ lock orl $0, (%esp)' > conftest.s
+ if { ac_try='$gcc_cv_as $gcc_cv_as_flags -o conftest.o conftest.s >&5'
+ { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
+ (eval $ac_try) 2>&5
+ ac_status=$?
+ $as_echo "$as_me:${as_lineno-$LINENO}: \$? = $ac_status" >&5
+ test $ac_status = 0; }; }
+ then
+ gcc_cv_as_ix86_rep_lock_prefix=yes
+ else
+ echo "configure: failed program was" >&5
+ cat conftest.s >&5
+ fi
+ rm -f conftest.o conftest.s
+ fi
+fi
+{ $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_as_ix86_rep_lock_prefix" >&5
+$as_echo "$gcc_cv_as_ix86_rep_lock_prefix" >&6; }
+
+
+cat >>confdefs.h <<_ACEOF
+#define HAVE_AS_IX86_REP_LOCK_PREFIX `if test $gcc_cv_as_ix86_rep_lock_prefix = yes; then echo 1; else echo 0; fi`
+_ACEOF
+
+
;;
ia64*-*-*)
[AC_DEFINE(HAVE_AS_IX86_DIFF_SECT_DELTA, 1,
[Define if your assembler supports the subtraction of symbols in different sections.])])
- # This one is used unconditionally by i386.[ch]; it is to be defined
+ # These two are used unconditionally by i386.[ch]; it is to be defined
# to 1 if the feature is present, 0 otherwise.
gcc_GAS_CHECK_FEATURE([GOTOFF in data],
gcc_cv_as_ix86_gotoff_in_data, [2,11,0],,
AC_DEFINE_UNQUOTED(HAVE_AS_GOTOFF_IN_DATA,
[`if test $gcc_cv_as_ix86_gotoff_in_data = yes; then echo 1; else echo 0; fi`],
[Define true if the assembler supports '.long foo@GOTOFF'.])
+
+ gcc_GAS_CHECK_FEATURE([rep and lock prefix],
+ gcc_cv_as_ix86_rep_lock_prefix,,,
+ [rep movsl
+ lock orl $0, (%esp)])
+ AC_DEFINE_UNQUOTED(HAVE_AS_IX86_REP_LOCK_PREFIX,
+ [`if test $gcc_cv_as_ix86_rep_lock_prefix = yes; then echo 1; else echo 0; fi`],
+ [Define true if the assembler supports 'rep <insn>, lock <insn>'.])
+
;;
ia64*-*-*)
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