}
}
-\f
-/* Output insns to flush the {data|instruction} caches after building a
- trampoline. */
-
-static void
-rs6000_sync_trampoline (addr)
- rtx addr;
-{
- enum machine_mode pmode = Pmode;
- rtx reg = gen_reg_rtx (pmode);
- rtx mem2;
- rtx mem1;
- int size = rs6000_trampoline_size ();
- rtx (*sub_fcn) PROTO ((rtx, rtx, rtx));
- rtx (*cmp_fcn) PROTO ((rtx, rtx));
- rtx label;
-
- if (TARGET_32BIT)
- {
- sub_fcn = gen_subsi3;
- cmp_fcn = gen_cmpsi;
- }
- else
- {
- sub_fcn = gen_subdi3;
- cmp_fcn = gen_cmpdi;
- }
-
- addr = force_reg (pmode, addr);
- mem2 = gen_rtx (MEM, pmode, gen_rtx (PLUS, pmode, addr, reg));
- mem1 = gen_rtx (MEM, pmode, addr);
-
- /* Issue a loop of dcbst's to flush the data cache */
- emit_move_insn (reg, GEN_INT (size-4));
- label = gen_label_rtx ();
- emit_label (label);
- emit_insn (gen_dcbst (mem2, addr, reg));
- emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
- emit_insn ((*cmp_fcn) (reg, const0_rtx));
- emit_jump_insn (gen_bgt (label));
-
- /* Issue a sync after the dcbst's to let things settle down */
- emit_insn (gen_sync (mem1));
-
- /* Issue a loop of icbi's to flush the instruction cache */
- emit_move_insn (reg, GEN_INT (size-4));
- label = gen_label_rtx ();
- emit_label (label);
- emit_insn (gen_icbi (mem2, addr, reg));
- emit_insn ((*sub_fcn) (reg, reg, GEN_INT (4)));
- emit_insn ((*cmp_fcn) (reg, const0_rtx));
- emit_jump_insn (gen_bgt (label));
-
- /* Issue a sync after the icbi's to let things settle down */
- emit_insn (gen_sync (mem1));
-
- /* Finally issue an isync to synchronize the icache */
- emit_insn (gen_isync (mem1));
-}
\f
/* Output assembler code for a block containing the constant parts
the address of the function, the second word is the TOC pointer (r2),
and the third word is the static chain value. */
case ABI_AIX:
- fprintf (file, "\t.long %s\n", (TARGET_32BIT) ? "0,0,0" : "0,0,0,0,0,0");
break;
case ABI_V4:
case ABI_SOLARIS:
case ABI_AIX_NODESC:
- if (STATIC_CHAIN_REGNUM == 0 || !TARGET_NEW_MNEMONICS)
- abort ();
-
- if (TARGET_32BIT)
- {
- fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
- fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
- fprintf (file, "\t.long 0,0\n"); /* offset 8 */
- fprintf (file, ".LTRAMP1:\n");
- fprintf (file, "\tmflr %s\n", sc); /* offset 20 */
- fprintf (file, "\tmtlr %s\n", r0); /* offset 24 */
- fprintf (file, "\tlwz %s,0(%s)\n", r0, sc); /* offset 28 */
- fprintf (file, "\tlwz %s,4(%s)\n", sc, sc); /* offset 32 */
- fprintf (file, "\tmtctr %s\n", r0); /* offset 36 */
- fprintf (file, "\tbctr\n"); /* offset 40 */
- }
- else
- {
- fprintf (file, "\tmflr %s\n", r0); /* offset 0 */
- fprintf (file, "\tbl .LTRAMP1\n"); /* offset 4 */
- fprintf (file, "\t.long 0,0,0,0\n"); /* offset 8 */
- fprintf (file, ".LTRAMP1:\n");
- fprintf (file, "\tmflr %s\n", sc); /* offset 28 */
- fprintf (file, "\tmtlr %s\n", r0); /* offset 32 */
- fprintf (file, "\tld %s,0(%s)\n", r0, sc); /* offset 36 */
- fprintf (file, "\tld %s,8(%s)\n", sc, sc); /* offset 40 */
- fprintf (file, "\tmtctr %s\n", r0); /* offset 44 */
- fprintf (file, "\tbctr\n"); /* offset 48 */
- }
break;
/* NT function pointers point to a two word area (real address, TOC)
}
break;
- /* Under V.4/eabi, update the two words after the bl to have the real
- function address and the static chain. */
+ /* Under V.4/eabi, call __trampoline_setup to do the real work. */
case ABI_V4:
case ABI_SOLARIS:
case ABI_AIX_NODESC:
- {
- rtx reg = gen_reg_rtx (pmode);
- emit_move_insn (reg, fnaddr);
- emit_move_insn (MEM_PLUS (addr, 8), reg);
- emit_move_insn (MEM_PLUS (addr, 8 + regsize), ctx_reg);
- rs6000_sync_trampoline (addr);
- }
+ emit_library_call (gen_rtx (SYMBOL_REF, SImode, "__trampoline_setup"),
+ FALSE, VOIDmode, 4,
+ addr, pmode,
+ GEN_INT (rs6000_trampoline_size ()), SImode,
+ fnaddr, pmode,
+ ctx_reg, pmode);
break;
/* Under NT, update the first word to point to the ..LTRAMP1..0 header,
}
#endif /* USING_SVR4_H */
-
-\f
-/* CYGNUS LOCAL mac */
-
-/* Whether we are using m68k-compatible alignment. */
-
-int mac68k_aligned;
-
-/* Most Mac compiler pragmas are unimportant, but we must recognize
- the m68k alignment pragma, because that is crucial to transitions
- to and from the m68k emulator on PowerMacs. */
-
-int
-handle_mac_pragma (finput, t)
- FILE *finput;
- tree t;
-{
- int retval = 0;
- register char *pname;
- char pbuf[200];
- int c, psize = 0;
-
- if (TREE_CODE (t) != IDENTIFIER_NODE)
- return 0;
-
- pname = IDENTIFIER_POINTER (t);
- if (strcmp (pname, "segment") == 0)
- {
- /* (should collect pbuf + 8 into a segment name) */
- }
- else if (strcmp (pname, "options") == 0)
- {
- c = getc (finput);
- /* Skip over initial whitespace. */
- while (c == ' ' || c == '\t')
- c = getc (finput);
-
- /* Return without doing anything if no content. */
- if (c == '\n' || c == EOF)
- {
- ungetc (c, finput);
- return 0;
- }
-
- /* Collect the rest of the line. */
- while (psize < sizeof (pbuf) - 1 && c != '\n')
- {
- pbuf[psize++] = c;
- c = getc (finput);
- }
-
- if (strncmp (pbuf, "align=mac68k", 12) == 0)
- {
- mac68k_aligned = 1;
- retval = 1;
- }
- else if (strncmp (pbuf, "align=power", 11) == 0)
- {
- mac68k_aligned = 0;
- retval = 1;
- }
- else if (strncmp (pbuf, "align=reset", 11) == 0)
- {
- mac68k_aligned = 0;
- retval = 1;
- }
- }
-
- return retval;
-}
-/* END CYGNUS LOCAL mac */
extern struct rs6000_cpu_select rs6000_select[];
-
/* Sometimes certain combinations of command options do not make sense
on a particular target machine. You can define a macro
`OVERRIDE_OPTIONS' to take account of this. This macro, if
#define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
\f
-/* Output assembler code for a block containing the constant parts
- of a trampoline, leaving space for the variable parts.
-
- The trampoline should set the static chain pointer to value placed
- into the trampoline and should branch to the specified routine. */
-#define TRAMPOLINE_TEMPLATE(FILE) rs6000_trampoline_template (FILE)
+/* TRAMPOLINE_TEMPLATE deleted */
/* Length in units of the trampoline for entering a nested function. */
operands[2] = gen_rtx (MEM, DFmode,
gen_rtx (PLUS, Pmode,
indx,
- GEN_INT (rs6000_fpmem_offset)));
+ GEN_INT ((((rs6000_fpmem_offset & 0xffff)
+ ^ 0x8000) - 0x8000))));
return \"stfd %0,%w2\";
}"
else if (INTVAL (operands[2]) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn (\"creqv 6,6,6\", operands);
- return \"bl %z0\";
+ return (flag_pic) ? \"bl %z0@plt\" : \"bl %z0\";
}"
[(set_attr "type" "branch")
(set_attr "length" "4,8")])
else if (INTVAL (operands[3]) & CALL_V4_CLEAR_FP_ARGS)
output_asm_insn (\"creqv 6,6,6\", operands);
- return \"bl %z1\";
+ return (flag_pic) ? \"bl %z1@plt\" : \"bl %z1\";
}"
[(set_attr "type" "branch")
(set_attr "length" "4,8")])
""
"")
-;; Synchronize instructions/data caches for V.4 trampolines
-;; The extra memory_operand is to prevent the optimizer from
-;; deleting insns with "no" effect.
-(define_insn "icbi"
- [(unspec [(match_operand 0 "memory_operand" "=m")
- (match_operand 1 "register_operand" "b")
- (match_operand 2 "register_operand" "r")] 3)]
- "TARGET_POWERPC"
- "icbi %1,%2")
-
-(define_insn "dcbst"
- [(unspec [(match_operand 0 "memory_operand" "=m")
- (match_operand 1 "register_operand" "b")
- (match_operand 2 "register_operand" "r")] 4)]
- "TARGET_POWERPC"
- "dcbst %1,%2")
-
-(define_insn "sync"
- [(unspec [(match_operand 0 "memory_operand" "=m")] 5)]
- ""
- "{dcs|sync}")
-
-(define_insn "isync"
- [(unspec [(match_operand 0 "memory_operand" "=m")] 6)]
- ""
- "{ics|isync}")
-
-
;; V.4 specific code to initialize the PIC register
(define_insn "init_v4_pic"
[(set (match_operand:SI 0 "register_operand" "=l")
(unspec [(const_int 0)] 7))]
"DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS"
- "bl _GLOBAL_OFFSET_TABLE_-4"
+ "bl _GLOBAL_OFFSET_TABLE_@local-4"
[(set_attr "type" "branch")])
\f
int ret;
int dummy = 0;
- /* Load up r13 before we do anything else. */
- __asm__ volatile ("mr %%r13,%0;mr %%r2,%1" : "=r" (dummy) : "r" (&_SDA_BASE_[0]), "r" (&_SDA2_BASE_[0]));
- _environ = envp;
+ /* Load up r13/r2 before we do anything else. */
+ __asm__ volatile ("mr %%r13,%0;mr %%r2,%1" : "=r" (dummy) : "r" (&_SDA_BASE_[0]), "r" (&_SDA2_BASE_[0]), "r" (dummy));
+ _environ = envp + dummy;
- /* Register loader termination function */
- if (termfunc || dummy)
+ /* Register loader termination function (the || dummy is to make sure the above asm
+ is not optimized away). */
+ if (termfunc)
atexit (termfunc);
/* Register exception handler if needed */
%{memb} %{!memb: %{msdata: -memb} %{msdata=eabi: -memb}} \
%{mlittle} %{mlittle-endian} %{mbig} %{mbig-endian} \
%{!mlittle: %{!mlittle-endian: %{!mbig: %{!mbig-endian: \
- %{mcall-solaris: -mlittle} %{mcall-linux: -mbig} }}}}"
+ %{mcall-solaris: -mlittle -msolaris} %{mcall-linux: -mbig} }}}}"
#undef CC1_SPEC
/* Pass -G xxx to the compiler and set correct endian mode */
-# Do not build libgcc1.
-LIBGCC1 =
-CROSS_LIBGCC1 =
-
-# These are really part of libgcc1, but this will cause them to be
-# built correctly, so... [taken from t-sparclite]
-LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c eabi.S eabi-ctors.c
-
-dp-bit.c: $(srcdir)/config/fp-bit.c
- cat $(srcdir)/config/fp-bit.c > dp-bit.c
-
-fp-bit.c: $(srcdir)/config/fp-bit.c
- echo '#define FLOAT' > fp-bit.c
- cat $(srcdir)/config/fp-bit.c >> fp-bit.c
-
-eabi.S: $(srcdir)/config/rs6000/eabi.asm
- cat $(srcdir)/config/rs6000/eabi.asm > eabi.S
-
-eabi-ctors.c: $(srcdir)/config/rs6000/eabi-ctors.c
- cat $(srcdir)/config/rs6000/eabi-ctors.c > eabi-ctors.c
+# PowerPC support without gas
# Build libgcc.a with different options. If no gas support, don't build
# explicit little endian or big endian libraries, since it depends on the
# -mbig/-mlittle switches passed to gas. The -mrelocatable support also needs
# -mrelocatable passed to gas, so don't use it either.
+
MULTILIB_OPTIONS = msoft-float
MULTILIB_DIRNAMES = nof
-MULTILIB_MATCHES =
MULTILIB_EXCEPTIONS =
-
-LIBGCC = stmp-multilib
-INSTALL_LIBGCC = install-multilib
-EXTRA_MULTILIB_PARTS = ecrti$(objext) ecrtn$(objext) scrt0$(objext) scrti$(objext) scrtn$(objext)
-
-# For eabigas we build {e,s}crti.o and {e,s}crtn.o which serve to add begin and
-# end labels to all of the special sections used when we link using gcc.
-
-# Assemble startup files.
-ecrti.S: $(srcdir)/config/rs6000/eabi-ci.asm
- cat $(srcdir)/config/rs6000/eabi-ci.asm >ecrti.S
-
-ecrtn.S: $(srcdir)/config/rs6000/eabi-cn.asm
- cat $(srcdir)/config/rs6000/eabi-cn.asm >ecrtn.S
-
-scrti.S: $(srcdir)/config/rs6000/sol-ci.asm
- cat $(srcdir)/config/rs6000/sol-ci.asm >scrti.S
-
-scrtn.S: $(srcdir)/config/rs6000/sol-cn.asm
- cat $(srcdir)/config/rs6000/sol-cn.asm >scrtn.S
-
-scrt0.c: $(srcdir)/config/rs6000/sol-c0.c
- cat $(srcdir)/config/rs6000/sol-c0.c >scrt0.c
-
-# Build multiple copies of ?crt{i,n}.o, one for each target switch.
-$(T)ecrti$(objext): ecrti.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)ecrti$(objext)
-
-$(T)ecrtn$(objext): ecrtn.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrtn.S -o $(T)ecrtn$(objext)
-
-$(T)scrti$(objext): scrti.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)scrti$(objext)
-
-$(T)scrtn$(objext): scrtn.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)scrtn$(objext)
-
-$(T)scrt0$(objext): scrt0.c
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)scrt0$(objext)
+MULTILIB_EXTRA_OPTS =
+MULTILIB_MATCHES = ${MULTILIB_MATCHES_FLOAT}
--- /dev/null
+# Common support for PowerPC eabi, System V targets.
+
+# Do not build libgcc1.
+LIBGCC1 =
+CROSS_LIBGCC1 =
+
+# These are really part of libgcc1, but this will cause them to be
+# built correctly, so... [taken from t-sparclite]
+LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c eabi.S eabi-ctors.c tramp.S
+
+dp-bit.c: $(srcdir)/config/fp-bit.c
+ cat $(srcdir)/config/fp-bit.c > dp-bit.c
+
+fp-bit.c: $(srcdir)/config/fp-bit.c
+ echo '#define FLOAT' > fp-bit.c
+ cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+eabi.S: $(srcdir)/config/rs6000/eabi.asm
+ cat $(srcdir)/config/rs6000/eabi.asm > eabi.S
+
+eabi-ctors.c: $(srcdir)/config/rs6000/eabi-ctors.c
+ cat $(srcdir)/config/rs6000/eabi-ctors.c > eabi-ctors.c
+
+tramp.S: $(srcdir)/config/rs6000/tramp.asm
+ cat $(srcdir)/config/rs6000/tramp.asm > tramp.S
+
+# Switch synonyms
+MULTILIB_MATCHES_FLOAT = msoft-float=mcpu?403 msoft-float=mcpu?821 msoft-float=mcpu?860
+MULTILIB_MATCHES_ENDIAN = mlittle=mlittle-endian mbig=mbig-endian
+MULTILIB_MATCHES_SYSV = mcall-sysv=mcall-sysv-eabi mcall-sysv=mcall-sysv-noeabi
+
+LIBGCC = stmp-multilib
+INSTALL_LIBGCC = install-multilib
+EXTRA_MULTILIB_PARTS = ecrti$(objext) ecrtn$(objext) scrt0$(objext) scrti$(objext) scrtn$(objext)
+
+# We build {e,s}crti.o, {e,s}crtn.o, and scrt0.o which serve to add begin and
+# end labels to all of the special sections used when we link using gcc.
+
+# Assemble startup files.
+ecrti.S: $(srcdir)/config/rs6000/eabi-ci.asm
+ cat $(srcdir)/config/rs6000/eabi-ci.asm >ecrti.S
+
+ecrtn.S: $(srcdir)/config/rs6000/eabi-cn.asm
+ cat $(srcdir)/config/rs6000/eabi-cn.asm >ecrtn.S
+
+scrti.S: $(srcdir)/config/rs6000/sol-ci.asm
+ cat $(srcdir)/config/rs6000/sol-ci.asm >scrti.S
+
+scrtn.S: $(srcdir)/config/rs6000/sol-cn.asm
+ cat $(srcdir)/config/rs6000/sol-cn.asm >scrtn.S
+
+scrt0.c: $(srcdir)/config/rs6000/sol-c0.c
+ cat $(srcdir)/config/rs6000/sol-c0.c >scrt0.c
+
+# Build multiple copies of ?crt{i,n}.o, one for each target switch.
+$(T)ecrti$(objext): ecrti.S
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)ecrti$(objext)
+
+$(T)ecrtn$(objext): ecrtn.S
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrtn.S -o $(T)ecrtn$(objext)
+
+$(T)scrti$(objext): scrti.S
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c scrti.S -o $(T)scrti$(objext)
+
+$(T)scrtn$(objext): scrtn.S
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c scrtn.S -o $(T)scrtn$(objext)
+
+$(T)scrt0$(objext): scrt0.c
+ $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c scrt0.c -o $(T)scrt0$(objext)
-# Do not build libgcc1.
-LIBGCC1 =
-CROSS_LIBGCC1 =
-
-# These are really part of libgcc1, but this will cause them to be
-# built correctly, so... [taken from t-sparclite]
-LIB2FUNCS_EXTRA = fp-bit.c dp-bit.c eabi.S eabi-ctors.c
-
-dp-bit.c: $(srcdir)/config/fp-bit.c
- cat $(srcdir)/config/fp-bit.c > dp-bit.c
-
-fp-bit.c: $(srcdir)/config/fp-bit.c
- echo '#define FLOAT' > fp-bit.c
- cat $(srcdir)/config/fp-bit.c >> fp-bit.c
-
-eabi.S: $(srcdir)/config/rs6000/eabi.asm
- cat $(srcdir)/config/rs6000/eabi.asm > eabi.S
-
-eabi-ctors.c: $(srcdir)/config/rs6000/eabi-ctors.c
- cat $(srcdir)/config/rs6000/eabi-ctors.c > eabi-ctors.c
-
+# PowerPC embedded support with gas.
# Build libgcc.a with different options.
MULTILIB_OPTIONS = msoft-float \
le be \
cs ca sol lin
-MULTILIB_MATCHES = mlittle=mlittle-endian \
- mbig=mbig-endian \
- msoft-float=mcpu?403 \
- msoft-float=mcpu?821 \
- msoft-float=mcpu?860 \
- mcall-sysv=mcall-sysv-eabi \
- mcall-sysv=mcall-sysv-noeabi
-
MULTILIB_EXTRA_OPTS = mrelocatable-lib mno-eabi
MULTILIB_EXCEPTIONS = *mbig/*mcall-solaris* \
*mlittle/*mcall-solaris* \
*mlittle/*mcall-linux* \
*msoft-float/*mcall-linux*
-LIBGCC = stmp-multilib
-INSTALL_LIBGCC = install-multilib
-EXTRA_MULTILIB_PARTS = ecrti$(objext) ecrtn$(objext) scrt0$(objext) scrti$(objext) scrtn$(objext)
-
-# For eabigas we build {e,s}crti.o and {e,s}crtn.o which serve to add begin and
-# end labels to all of the special sections used when we link using gcc.
-
-# Assemble startup files.
-ecrti.S: $(srcdir)/config/rs6000/eabi-ci.asm
- cat $(srcdir)/config/rs6000/eabi-ci.asm >ecrti.S
-
-ecrtn.S: $(srcdir)/config/rs6000/eabi-cn.asm
- cat $(srcdir)/config/rs6000/eabi-cn.asm >ecrtn.S
-
-scrti.S: $(srcdir)/config/rs6000/sol-ci.asm
- cat $(srcdir)/config/rs6000/sol-ci.asm >scrti.S
-
-scrtn.S: $(srcdir)/config/rs6000/sol-cn.asm
- cat $(srcdir)/config/rs6000/sol-cn.asm >scrtn.S
-
-scrt0.c: $(srcdir)/config/rs6000/sol-c0.c
- cat $(srcdir)/config/rs6000/sol-c0.c >scrt0.c
-
-# Build multiple copies of ?crt{i,n}.o, one for each target switch.
-$(T)ecrti$(objext): ecrti.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)ecrti$(objext)
-
-$(T)ecrtn$(objext): ecrtn.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrtn.S -o $(T)ecrtn$(objext)
-
-$(T)scrti$(objext): scrti.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)scrti$(objext)
-
-$(T)scrtn$(objext): scrtn.S
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)scrtn$(objext)
-
-$(T)scrt0$(objext): scrt0.c
- $(GCC_FOR_TARGET) $(GCC_CFLAGS) $(INCLUDES) $(MULTILIB_CFLAGS) -c ecrti.S -o $(T)scrt0$(objext)
+MULTILIB_MATCHES = ${MULTILIB_MATCHES_FLOAT} \
+ ${MULTILIB_MATCHES_ENDIAN} \
+ ${MULTILIB_MATCHES_SYSV}
--- /dev/null
+# Target config file for a System V based system (Solaris, Linux, Netbsd) with gas
+
+# Build libgcc.a with different options. With gas, build pic libraries
+# as well no floating point
+MULTILIB_OPTIONS = msoft-float fPIC
+MULTILIB_DIRNAMES = nof pic
+MULTILIB_EXCEPTIONS =
+MULTILIB_MATCHES = ${MULTILIB_MATCHES_FLOAT} \
+ fPIC=mrelocatable-lib \
+ fPIC=mrelocatable \
+ fPIC=fpic
--- /dev/null
+/* CYGNUS LOCAL -- waiting for FSF sources to be restored/meissner */
+/*
+ * special support for trampolines
+ *
+ * Copyright (C) 1996 Free Software Foundation, Inc.
+ * Written By Michael Meissner
+ *
+ * This file is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2, or (at your option) any
+ * later version.
+ *
+ * In addition to the permissions in the GNU General Public License, the
+ * Free Software Foundation gives you unlimited permission to link the
+ * compiled version of this file with other programs, and to distribute
+ * those programs without any restriction coming from the use of this
+ * file. (The General Public License restrictions do apply in other
+ * respects; for example, they cover modification of the file, and
+ * distribution when not linked into another program.)
+ *
+ * This file is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; see the file COPYING. If not, write to
+ * the Free Software Foundation, 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ *
+ * As a special exception, if you link this library with files
+ * compiled with GCC to produce an executable, this does not cause
+ * the resulting executable to be covered by the GNU General Public License.
+ * This exception does not however invalidate any other reasons why
+ * the executable file might be covered by the GNU General Public License.
+ */
+
+/* Set up trampolines */
+
+ .file "tramp.asm"
+ .section ".text"
+ #include "ppc-asm.h"
+
+ .globl __trampoline_initial
+ .type __trampoline_initial,@object
+ .align 2
+__trampoline_initial:
+ mflr r0
+ bl 1f
+.Lfunc = .-__trampoline_initial
+ .long 0 /* will be replaced with function address */
+.Lchain = .-__trampoline_initial
+ .long 0 /* will be replaced with static chain */
+1: mflr r11
+ mtlr r0
+ lwz r0,0(r11) /* function address */
+ lwz r11,4(r11) /* static chain */
+ mtctr r0
+ bctr
+
+__trampoline_size = .-__trampoline_initial
+ .size __trampoline_initial,__trampoline_size
+
+ .section ".got2","aw"
+.LCTOC1 = .+32768
+.Ltramp = .-.LCTOC1
+ .long __trampoline_initial-4
+
+ .section ".text"
+.LCL0:
+ .long .LCTOC1-.LCF0
+
+/* R3 = stack address to store trampoline */
+/* R4 = length of trampoline area */
+/* R5 = function address */
+/* R6 = static chain */
+
+FUNC_START(__trampoline_setup)
+ mflr r0 /* save return address */
+ bl .LCF0 /* load up __trampoline_initial into r7 */
+.LCF0:
+ mflr r11
+ lwz r12,(.LCL0-.LCF0)(r11)
+ add r11,r12,r11
+ lwz r7,.Ltramp(r11) /* trampoline addres -4 */
+
+ li r8,__trampoline_size /* verify that the trampoline is big enough */
+ cmpw cr1,r8,r4
+ srwi r4,r4,2 /* # words to move */
+ addi r9,r3,-4 /* adjust pointer for lwzu */
+ mtctr r4
+ blt cr1,.Labort
+
+ mtlr r0
+
+ /* Copy the instructions to the stack */
+.Lmove:
+ lwzu r10,4(r7)
+ stwu r10,4(r9)
+ bdnz .Lmove
+
+ /* Store correct function and static chain */
+ stw r5,.Lfunc(r3)
+ stw r6,.Lchain(r3)
+
+ /* Now flush both caches */
+ mtctr r4
+.Lcache:
+ icbi 0,r3
+ dcbf 0,r3
+ addi r3,r3,4
+ bdnz .Lcache
+
+ /* Finally synchronize things & return */
+ sync
+ isync
+ blr
+
+.Labort:
+ bl abort
+FUNC_END(__trampoline_setup)
+/* END CYGNUS LOCAL -- waiting for FSF sources to be restored/meissner */
#undef HAS_INIT_SECTION
#define HAS_INIT_SECTION
+
+/* Output assembler code for a block containing the constant parts
+ of a trampoline, leaving space for the variable parts.
+
+ The trampoline should set the static chain pointer to value placed
+ into the trampoline and should branch to the specified routine. */
+#define TRAMPOLINE_TEMPLATE(FILE) rs6000_trampoline_template (FILE)
#define r29 29
#define r30 30
#define r31 31
+
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+
+#define f0 0
+#define f1 1
+#define f2 2
+#define f3 3
+#define f4 4
+#define f5 5
+#define f6 6
+#define f7 7
+#define f8 8
+#define f9 9
+#define f10 10
+#define f11 11
+#define f12 12
+#define f13 13
+#define f14 14
+#define f15 15
+#define f16 16
+#define f17 17
+#define f18 18
+#define f19 19
+#define f20 20
+#define f21 21
+#define f22 22
+#define f23 23
+#define f24 24
+#define f25 25
+#define f26 26
+#define f27 27
+#define f28 28
+#define f29 29
+#define f30 30
+#define f31 31
#endif
/*
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