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(reload_insi): Delete.
authorwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 12 Aug 1993 17:51:16 +0000 (17:51 +0000)
committerwilson <wilson@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 12 Aug 1993 17:51:16 +0000 (17:51 +0000)
(*): Fix all callers of legitimize_pic_address and emit_move_sequence.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@5143 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/config/sparc/sparc.md

index 65357a9..c0c1bca 100644 (file)
   ""
   "
 {
-  if (emit_move_sequence (operands, SImode, NULL_RTX))
+  if (emit_move_sequence (operands, SImode))
     DONE;
 }")
 
-(define_expand "reload_insi"
-  [(set (match_operand:SI 0 "register_operand" "=r")
-       (match_operand:SI 1 "general_operand" ""))
-   (clobber (match_operand:SI 2 "register_operand" "=&r"))]
-  ""
-  "
-{
-  if (emit_move_sequence (operands, SImode, operands[2]))
-    DONE;
-
-  /* We don't want the clobber emitted, so handle this ourselves.  */
-  emit_insn (gen_rtx (SET, VOIDmode, operands[0], operands[1]));
-  DONE;
-}")
-
 ;; We must support both 'r' and 'f' registers here, because combine may
 ;; convert SFmode hard registers to SImode hard registers when simplifying
 ;; subreg sets.
   ""
   "
 {
-  if (emit_move_sequence (operands, HImode, NULL_RTX))
+  if (emit_move_sequence (operands, HImode))
     DONE;
 }")
 
   ""
   "
 {
-  if (emit_move_sequence (operands, QImode, NULL_RTX))
+  if (emit_move_sequence (operands, QImode))
     DONE;
 }")
 
   ""
   "
 {
-  if (emit_move_sequence (operands, TFmode, NULL_RTX))
+  if (emit_move_sequence (operands, TFmode))
     DONE;
 }")
 
   ""
   "
 {
-  if (emit_move_sequence (operands, DFmode, NULL_RTX))
+  if (emit_move_sequence (operands, DFmode))
     DONE;
 }")
 
   ""
   "
 {
-  if (emit_move_sequence (operands, DImode, NULL_RTX))
+  if (emit_move_sequence (operands, DImode))
     DONE;
 }")
 
   ""
   "
 {
-  if (emit_move_sequence (operands, SFmode, NULL_RTX))
+  if (emit_move_sequence (operands, SFmode))
     DONE;
 }")
 
   "
 {
   operands[1] = legitimize_pic_address (operands[1], GET_MODE (operands[0]),
-                                       operands[3], 0);
+                                       operands[3]);
 }")
 
 (define_split
   "
 {
   operands[2] = legitimize_pic_address (operands[2], GET_MODE (operands[1]),
-                                       operands[0], 0);
+                                       operands[0]);
 }")
 
 ;; Sign- and Zero-extend operations can have symbolic memory operands.
   "
 {
   operands[3] = legitimize_pic_address (operands[3], GET_MODE (operands[2]),
-                                       operands[0], 0);
+                                       operands[0]);
 }")
 
 (define_split
   [(set (match_dup 0) (match_dup 1))]
   "
 {
-  operands[1] = legitimize_pic_address (operands[1], Pmode, operands[0], 0);
+  operands[1] = legitimize_pic_address (operands[1], Pmode, operands[0]);
 }")
 \f
 ;; These split sne/seq insns.  The forms of the resulting insns are