* gcc/config/sh/sh.md (push_fpscr): Enable for TARGET_SH2E.

(pop_fpscr, fpu_switch): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@68520 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5c3911b..e92b4a5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2003-06-26  Dhananjay Deshpande  <dhananjayd@kpitcummins.com>
+
+       * gcc/config/sh/sh.md (push_fpscr): Enable for TARGET_SH2E.
+       (pop_fpscr, fpu_switch): Likewise.
+
 2003-06-26  Zdenek Dvorak  <rakdver@atrey.karlin.mff.cuni.cz>
 
        * value-prof.c: New.

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 5162723..1d72db6 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -3343,7 +3343,7 @@
 
 (define_expand "push_fpscr"
   [(const_int 0)]
-  "TARGET_SH3E"
+  "TARGET_SH2E"
   "
 {
   rtx insn = emit_insn (gen_fpu_switch (gen_rtx (MEM, PSImode,
@@ -3356,7 +3356,7 @@
 
 (define_expand "pop_fpscr"
   [(const_int 0)]
-  "TARGET_SH3E"
+  "TARGET_SH2E"
   "
 {
   rtx insn = emit_insn (gen_fpu_switch (get_fpscr_rtx (),
@@ -8093,7 +8093,7 @@ mov.l\\t1f,r0\\n\\
 (define_insn "fpu_switch"
   [(set (match_operand:PSI 0 "general_movdst_operand" "=c,c,r,c,c,r,m,r,<")
        (match_operand:PSI 1 "general_movsrc_operand" "c,>,m,m,r,r,r,!c,c"))]
-  "TARGET_SH3E
+  "TARGET_SH2E
    && (! reload_completed
        || true_regnum (operands[0]) != FPSCR_REG
        || GET_CODE (operands[1]) != MEM