* gcc.dg/arm-asm.c: Run this test on ARM chips, not SPARC. Use

__asm__ so that it works correctly even if -ansi -pedantic-errors.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@51851 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index ad1d876..1d555a2 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2002-04-04  Richard Earnshaw  <rearnsha@arm.com>
+
+       * gcc.dg/arm-asm.c: Run this test on ARM chips, not SPARC.  Use
+       __asm__ so that it works correctly even if -ansi -pedantic-errors.
+
 2002-04-03  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
 
        * gcc.misc-tests/linkage.exp: Update last change to handle

diff --git a/gcc/testsuite/gcc.dg/arm-asm.c b/gcc/testsuite/gcc.dg/arm-asm.c
index d64620c..083682d 100644 (file)
--- a/gcc/testsuite/gcc.dg/arm-asm.c
+++ b/gcc/testsuite/gcc.dg/arm-asm.c
@@ -1,12 +1,12 @@
 /* ARM and Thumb asm statements should be able to access the constant
    pool.  */
-/* { dg-do compile { target sparc*-*-* } } */
+/* { dg-do compile { target arm*-*-* } } */
 extern unsigned x[];
 unsigned *trapTable()
 {
   unsigned *i;
 
-  asm volatile("ldr %0,%1" : "=r"(i) : "m"(x[0]));
+  __asm__ volatile("ldr %0,%1" : "=r"(i) : "m"(x[0]));
 
   return i;
 }