* i386.h (ix86_size_cost): Declare.

	(ix86_cur_cost): New function macro.
	* i386.md (peepholes expanding size and splitters): Predicate by
	optimize_insn_for_speed_p.
	(peepholes reduce size and splitters): Predicate by
	optimize_insn_for_size_p.
	* i386.c (ix86_size_cost): Rename from ...
	(size_cost): This one.
	(override_options): Update.
	(decide_alg): Likewise.
	(ix86_expand_clear): Use RTL profile.
	(ix86_pad_returns): Use RTL profile.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@138864 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 20836b2..f3e43e4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,20 @@
 2008-08-07  Jan Hubicka  <jh@suse.cz>
 
+       * i386.h (ix86_size_cost): Declare.
+       (ix86_cur_cost): New function macro.
+       * i386.md (peepholes expanding size and splitters): Predicate by
+       optimize_insn_for_speed_p.
+       (peepholes reduce size and splitters): Predicate by
+       optimize_insn_for_size_p.
+       * i386.c (ix86_size_cost): Rename from ...
+       (size_cost): This one.
+       (override_options): Update.
+       (decide_alg): Likewise.
+       (ix86_expand_clear): Use RTL profile.
+       (ix86_pad_returns): Use RTL profile.
+
+2008-08-07  Jan Hubicka  <jh@suse.cz>
+
        * recog.c (split_all_insns): Set RTL profile
        (peephole2_optimize): Likewise.
        * function.c (thread_prologue_and_epilogue_insns): Likewise.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index e6499fa..73d1bb4 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -75,8 +75,8 @@ static rtx legitimize_dllimport_symbol (rtx, bool);
 
 #define DUMMY_STRINGOP_ALGS {libcall, {{-1, libcall}}}
 
-static const
-struct processor_costs size_cost = {   /* costs for tuning for size */
+const
+struct processor_costs ix86_size_cost = {/* costs for tuning for size */
   COSTS_N_BYTES (2),                   /* cost of an add instruction */
   COSTS_N_BYTES (3),                   /* cost of a lea instruction */
   COSTS_N_BYTES (2),                   /* variable shift costs */
@@ -2841,7 +2841,7 @@ override_options (bool main_args_p)
     ix86_tune_features[i] = !!(initial_ix86_tune_features[i] & ix86_tune_mask);
 
   if (optimize_size)
-    ix86_cost = &size_cost;
+    ix86_cost = &ix86_size_cost;
   else
     ix86_cost = processor_target_table[ix86_tune].cost;
 
@@ -11541,7 +11541,7 @@ ix86_expand_clear (rtx dest)
   tmp = gen_rtx_SET (VOIDmode, dest, const0_rtx);
 
   /* This predicate should match that for movsi_xor and movdi_xor_rex64.  */
-  if (reload_completed && (!TARGET_USE_MOV0 || optimize_size))
+  if (reload_completed && (!TARGET_USE_MOV0 || optimize_insn_for_speed_p ()))
     {
       rtx clob = gen_rtx_CLOBBER (VOIDmode, gen_rtx_REG (CCmode, FLAGS_REG));
       tmp = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (2, tmp, clob));
@@ -16632,7 +16632,7 @@ decide_alg (HOST_WIDE_INT count, HOST_WIDE_INT expected_size, bool memset,
                               && alg != rep_prefix_8_byte))
   const struct processor_costs *cost;
   
-  cost = optimize_insn_for_size_p () ? &size_cost : ix86_cost;
+  cost = optimize_insn_for_size_p () ? &ix86_size_cost : ix86_cost;
 
   *dynamic_check = -1;
   if (memset)
@@ -24828,7 +24828,7 @@ ix86_pad_returns (void)
       bool replace = false;
 
       if (!JUMP_P (ret) || GET_CODE (PATTERN (ret)) != RETURN
-         || !maybe_hot_bb_p (bb))
+         || optimize_bb_for_size_p (bb))
        continue;
       for (prev = PREV_INSN (ret); prev; prev = PREV_INSN (prev))
        if (active_insn_p (prev) || LABEL_P (prev))

diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h
index 3247c10..2387156 100644 (file)
--- a/gcc/config/i386/i386.h
+++ b/gcc/config/i386/i386.h
@@ -170,6 +170,10 @@ struct processor_costs {
 };
 
 extern const struct processor_costs *ix86_cost;
+extern const struct processor_costs ix86_size_cost;
+
+#define ix86_cur_cost() \
+  (optimize_insn_for_size_p () ? &ix86_size_cost: ix86_cost)
 
 /* Macros used in the machine description to test the flags.  */
 

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index ddd545d..f8d4c7d 100644 (file)
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -20030,7 +20030,7 @@
           (const_int 0)]))]
   "! TARGET_PARTIAL_REG_STALL && reload_completed
    && ! TARGET_FAST_PREFIX
-   && ! optimize_size
+   && optimize_insn_for_speed_p ()
    /* Ensure that the operand will remain sign-extended immediate.  */
    && ix86_match_ccmode (insn, INTVAL (operands[3]) >= 0 ? CCNOmode : CCZmode)"
   [(set (match_dup 0)
@@ -20050,7 +20050,8 @@
   "! TARGET_PARTIAL_REG_STALL && reload_completed
    && (GET_MODE (operands[0]) == HImode
        || (GET_MODE (operands[0]) == QImode
-          && (TARGET_PROMOTE_QImode || optimize_size)))"
+          && (TARGET_PROMOTE_QImode
+              || optimize_insn_for_size_p ())))"
   [(parallel [(set (match_dup 0)
                   (neg:SI (match_dup 1)))
              (clobber (reg:CC FLAGS_REG))])]
@@ -20063,7 +20064,8 @@
   "! TARGET_PARTIAL_REG_STALL && reload_completed
    && (GET_MODE (operands[0]) == HImode
        || (GET_MODE (operands[0]) == QImode
-          && (TARGET_PROMOTE_QImode || optimize_size)))"
+          && (TARGET_PROMOTE_QImode
+              || optimize_insn_for_size_p ())))"
   [(set (match_dup 0)
        (not:SI (match_dup 1)))]
   "operands[0] = gen_lowpart (SImode, operands[0]);
@@ -20078,7 +20080,8 @@
   "! TARGET_PARTIAL_REG_STALL && TARGET_CMOVE
    && (GET_MODE (operands[0]) == HImode
        || (GET_MODE (operands[0]) == QImode
-          && (TARGET_PROMOTE_QImode || optimize_size)))"
+          && (TARGET_PROMOTE_QImode
+              || optimize_insn_for_size_p ())))"
   [(set (match_dup 0)
        (if_then_else:SI (match_dup 1) (match_dup 2) (match_dup 3)))]
   "operands[0] = gen_lowpart (SImode, operands[0]);
@@ -20094,7 +20097,7 @@
   [(set (match_operand:SI 0 "push_operand" "")
        (match_operand:SI 1 "memory_operand" ""))
    (match_scratch:SI 2 "r")]
-  "!optimize_size && !TARGET_PUSH_MEMORY
+  "optimize_insn_for_speed_p () && !TARGET_PUSH_MEMORY
    && !RTX_FRAME_RELATED_P (peep2_next_insn (0))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
@@ -20104,7 +20107,7 @@
   [(set (match_operand:DI 0 "push_operand" "")
        (match_operand:DI 1 "memory_operand" ""))
    (match_scratch:DI 2 "r")]
-  "!optimize_size && !TARGET_PUSH_MEMORY
+  "optimize_insn_for_speed_p () && !TARGET_PUSH_MEMORY
    && !RTX_FRAME_RELATED_P (peep2_next_insn (0))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
@@ -20116,7 +20119,7 @@
   [(set (match_operand:SF 0 "push_operand" "")
        (match_operand:SF 1 "memory_operand" ""))
    (match_scratch:SF 2 "r")]
-  "!optimize_size && !TARGET_PUSH_MEMORY
+  "optimize_insn_for_speed_p () && !TARGET_PUSH_MEMORY
    && !RTX_FRAME_RELATED_P (peep2_next_insn (0))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
@@ -20126,7 +20129,7 @@
   [(set (match_operand:HI 0 "push_operand" "")
        (match_operand:HI 1 "memory_operand" ""))
    (match_scratch:HI 2 "r")]
-  "!optimize_size && !TARGET_PUSH_MEMORY
+  "optimize_insn_for_speed_p () && !TARGET_PUSH_MEMORY
    && !RTX_FRAME_RELATED_P (peep2_next_insn (0))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
@@ -20136,7 +20139,7 @@
   [(set (match_operand:QI 0 "push_operand" "")
        (match_operand:QI 1 "memory_operand" ""))
    (match_scratch:QI 2 "q")]
-  "!optimize_size && !TARGET_PUSH_MEMORY
+  "optimize_insn_for_speed_p () && !TARGET_PUSH_MEMORY
    && !RTX_FRAME_RELATED_P (peep2_next_insn (0))"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
@@ -20148,10 +20151,10 @@
   [(match_scratch:SI 1 "r")
    (set (match_operand:SI 0 "memory_operand" "")
         (const_int 0))]
-  "! optimize_size
+  "optimize_insn_for_speed_p ()
    && ! TARGET_USE_MOV0
    && TARGET_SPLIT_LONG_MOVES
-   && get_attr_length (insn) >= ix86_cost->large_insn
+   && get_attr_length (insn) >= ix86_cur_cost ()->large_insn
    && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 1) (const_int 0))
              (clobber (reg:CC FLAGS_REG))])
@@ -20162,10 +20165,10 @@
   [(match_scratch:HI 1 "r")
    (set (match_operand:HI 0 "memory_operand" "")
         (const_int 0))]
-  "! optimize_size
+  "optimize_insn_for_speed_p ()
    && ! TARGET_USE_MOV0
    && TARGET_SPLIT_LONG_MOVES
-   && get_attr_length (insn) >= ix86_cost->large_insn
+   && get_attr_length (insn) >= ix86_cur_cost ()->large_insn
    && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 2) (const_int 0))
              (clobber (reg:CC FLAGS_REG))])
@@ -20176,10 +20179,10 @@
   [(match_scratch:QI 1 "q")
    (set (match_operand:QI 0 "memory_operand" "")
         (const_int 0))]
-  "! optimize_size
+  "optimize_insn_for_speed_p ()
    && ! TARGET_USE_MOV0
    && TARGET_SPLIT_LONG_MOVES
-   && get_attr_length (insn) >= ix86_cost->large_insn
+   && get_attr_length (insn) >= ix86_cur_cost ()->large_insn
    && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 2) (const_int 0))
              (clobber (reg:CC FLAGS_REG))])
@@ -20190,9 +20193,9 @@
   [(match_scratch:SI 2 "r")
    (set (match_operand:SI 0 "memory_operand" "")
         (match_operand:SI 1 "immediate_operand" ""))]
-  "! optimize_size
+  "optimize_insn_for_speed_p ()
    && TARGET_SPLIT_LONG_MOVES
-   && get_attr_length (insn) >= ix86_cost->large_insn"
+   && get_attr_length (insn) >= ix86_cur_cost ()->large_insn"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -20201,9 +20204,9 @@
   [(match_scratch:HI 2 "r")
    (set (match_operand:HI 0 "memory_operand" "")
         (match_operand:HI 1 "immediate_operand" ""))]
-  "! optimize_size
+  "optimize_insn_for_speed_p ()
    && TARGET_SPLIT_LONG_MOVES
-   && get_attr_length (insn) >= ix86_cost->large_insn"
+   && get_attr_length (insn) >= ix86_cur_cost ()->large_insn"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -20212,9 +20215,9 @@
   [(match_scratch:QI 2 "q")
    (set (match_operand:QI 0 "memory_operand" "")
         (match_operand:QI 1 "immediate_operand" ""))]
-  "! optimize_size
+  "optimize_insn_for_speed_p ()
    && TARGET_SPLIT_LONG_MOVES
-   && get_attr_length (insn) >= ix86_cost->large_insn"
+   && get_attr_length (insn) >= ix86_cur_cost ()->large_insn"
   [(set (match_dup 2) (match_dup 1))
    (set (match_dup 0) (match_dup 2))]
   "")
@@ -20226,7 +20229,7 @@
          [(match_operand:SI 2 "memory_operand" "")
           (const_int 0)]))
    (match_scratch:SI 3 "r")]
-  " ! optimize_size && ix86_match_ccmode (insn, CCNOmode)"
+  "optimize_insn_for_speed_p () && ix86_match_ccmode (insn, CCNOmode)"
   [(set (match_dup 3) (match_dup 2))
    (set (match_dup 0) (match_op_dup 1 [(match_dup 3) (const_int 0)]))]
   "")
@@ -20245,7 +20248,7 @@
 (define_peephole2
   [(set (match_operand:SI 0 "nonimmediate_operand" "")
        (not:SI (match_operand:SI 1 "nonimmediate_operand" "")))]
-  "!optimize_size
+  "optimize_insn_for_speed_p ()
    && ((TARGET_NOT_UNPAIRABLE
         && (!MEM_P (operands[0])
             || !memory_displacement_operand (operands[0], SImode)))
@@ -20259,7 +20262,7 @@
 (define_peephole2
   [(set (match_operand:HI 0 "nonimmediate_operand" "")
        (not:HI (match_operand:HI 1 "nonimmediate_operand" "")))]
-  "!optimize_size
+  "optimize_insn_for_speed_p ()
    && ((TARGET_NOT_UNPAIRABLE
         && (!MEM_P (operands[0])
             || !memory_displacement_operand (operands[0], HImode)))
@@ -20273,7 +20276,7 @@
 (define_peephole2
   [(set (match_operand:QI 0 "nonimmediate_operand" "")
        (not:QI (match_operand:QI 1 "nonimmediate_operand" "")))]
-  "!optimize_size
+  "optimize_insn_for_speed_p ()
    && ((TARGET_NOT_UNPAIRABLE
         && (!MEM_P (operands[0])
             || !memory_displacement_operand (operands[0], QImode)))
@@ -20372,7 +20375,7 @@
                      [(match_dup 0)
                       (match_operand:SI 1 "memory_operand" "")]))
               (clobber (reg:CC FLAGS_REG))])]
-  "! optimize_size && ! TARGET_READ_MODIFY"
+  "optimize_insn_for_speed_p ()"
   [(set (match_dup 2) (match_dup 1))
    (parallel [(set (match_dup 0)
                    (match_op_dup 3 [(match_dup 0) (match_dup 2)]))
@@ -20386,7 +20389,7 @@
                      [(match_operand:SI 1 "memory_operand" "")
                       (match_dup 0)]))
               (clobber (reg:CC FLAGS_REG))])]
-  "! optimize_size && ! TARGET_READ_MODIFY"
+  "optimize_insn_for_speed_p () && ! TARGET_READ_MODIFY"
   [(set (match_dup 2) (match_dup 1))
    (parallel [(set (match_dup 0)
                    (match_op_dup 3 [(match_dup 2) (match_dup 0)]))
@@ -20406,7 +20409,7 @@
                      [(match_dup 0)
                       (match_operand:SI 1 "nonmemory_operand" "")]))
               (clobber (reg:CC FLAGS_REG))])]
-  "! optimize_size && ! TARGET_READ_MODIFY_WRITE"
+  "optimize_insn_for_speed_p () && ! TARGET_READ_MODIFY_WRITE"
   [(set (match_dup 2) (match_dup 0))
    (parallel [(set (match_dup 2)
                    (match_op_dup 3 [(match_dup 2) (match_dup 1)]))
@@ -20421,7 +20424,7 @@
                      [(match_operand:SI 1 "nonmemory_operand" "")
                       (match_dup 0)]))
               (clobber (reg:CC FLAGS_REG))])]
-  "! optimize_size && ! TARGET_READ_MODIFY_WRITE"
+  "optimize_insn_for_speed_p () && ! TARGET_READ_MODIFY_WRITE"
   [(set (match_dup 2) (match_dup 0))
    (parallel [(set (match_dup 2)
                    (match_op_dup 3 [(match_dup 1) (match_dup 2)]))
@@ -20434,7 +20437,7 @@
   [(set (match_operand 0 "register_operand" "")
        (match_operand 1 "const0_operand" ""))]
   "GET_MODE_SIZE (GET_MODE (operands[0])) <= UNITS_PER_WORD
-   && (! TARGET_USE_MOV0 || optimize_size)
+   && (! TARGET_USE_MOV0 || optimize_insn_for_size_p ())
    && GENERAL_REG_P (operands[0])
    && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0) (const_int 0))
@@ -20448,7 +20451,7 @@
        (const_int 0))]
   "(GET_MODE (operands[0]) == QImode
     || GET_MODE (operands[0]) == HImode)
-   && (! TARGET_USE_MOV0 || optimize_size)
+   && (! TARGET_USE_MOV0 || optimize_insn_for_size_p ())
    && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (strict_low_part (match_dup 0)) (const_int 0))
              (clobber (reg:CC FLAGS_REG))])])
@@ -20460,7 +20463,7 @@
   "(GET_MODE (operands[0]) == HImode
     || GET_MODE (operands[0]) == SImode
     || (GET_MODE (operands[0]) == DImode && TARGET_64BIT))
-   && (optimize_size || TARGET_MOVE_M1_VIA_OR)
+   && (optimize_insn_for_size_p () || TARGET_MOVE_M1_VIA_OR)
    && peep2_regno_dead_p (0, FLAGS_REG)"
   [(parallel [(set (match_dup 0) (const_int -1))
              (clobber (reg:CC FLAGS_REG))])]
@@ -20551,7 +20554,7 @@
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -4)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_SUB_ESP_4"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_4"
   [(clobber (match_dup 0))
    (parallel [(set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_dup 0))
              (clobber (mem:BLK (scratch)))])])
@@ -20561,7 +20564,7 @@
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -8)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_SUB_ESP_8"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_8"
   [(clobber (match_dup 0))
    (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_dup 0))
    (parallel [(set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_dup 0))
@@ -20572,7 +20575,7 @@
   [(match_scratch:SI 0 "r")
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -4)))
              (clobber (reg:CC FLAGS_REG))])]
-  "optimize_size || !TARGET_SUB_ESP_4"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_4"
   [(clobber (match_dup 0))
    (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_dup 0))])
 
@@ -20580,7 +20583,7 @@
   [(match_scratch:SI 0 "r")
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int -8)))
              (clobber (reg:CC FLAGS_REG))])]
-  "optimize_size || !TARGET_SUB_ESP_8"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_8"
   [(clobber (match_dup 0))
    (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_dup 0))
    (set (mem:SI (pre_dec:SI (reg:SI SP_REG))) (match_dup 0))])
@@ -20591,7 +20594,7 @@
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 4)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_ADD_ESP_4"
+  "optimize_insn_for_size_p () || !TARGET_ADD_ESP_4"
   [(parallel [(set (match_dup 0) (mem:SI (reg:SI SP_REG)))
              (set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 4)))
              (clobber (mem:BLK (scratch)))])]
@@ -20605,7 +20608,7 @@
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 8)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_ADD_ESP_8"
+  "optimize_insn_for_size_p () || !TARGET_ADD_ESP_8"
   [(parallel [(set (match_dup 0) (mem:SI (reg:SI SP_REG)))
              (set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 4)))
              (clobber (mem:BLK (scratch)))])
@@ -20618,7 +20621,7 @@
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 8)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size"
+  "optimize_insn_for_size_p ()"
   [(parallel [(set (match_dup 0) (mem:SI (reg:SI SP_REG)))
              (set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 4)))
              (clobber (mem:BLK (scratch)))])
@@ -20654,7 +20657,7 @@
   [(match_scratch:SI 0 "r")
    (parallel [(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 8)))
              (clobber (reg:CC FLAGS_REG))])]
-  "optimize_size"
+  "optimize_insn_for_size_p ()"
   [(parallel [(set (match_dup 0) (mem:SI (reg:SI SP_REG)))
              (set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 4)))])
    (parallel [(set (match_dup 0) (mem:SI (reg:SI SP_REG)))
@@ -20683,7 +20686,7 @@
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -8)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_SUB_ESP_4"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_4"
   [(clobber (match_dup 0))
    (parallel [(set (mem:DI (pre_dec:DI (reg:DI SP_REG))) (match_dup 0))
              (clobber (mem:BLK (scratch)))])])
@@ -20693,7 +20696,7 @@
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -16)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_SUB_ESP_8"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_8"
   [(clobber (match_dup 0))
    (set (mem:DI (pre_dec:DI (reg:DI SP_REG))) (match_dup 0))
    (parallel [(set (mem:DI (pre_dec:DI (reg:DI SP_REG))) (match_dup 0))
@@ -20704,7 +20707,7 @@
   [(match_scratch:DI 0 "r")
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -8)))
              (clobber (reg:CC FLAGS_REG))])]
-  "optimize_size || !TARGET_SUB_ESP_4"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_4"
   [(clobber (match_dup 0))
    (set (mem:DI (pre_dec:DI (reg:DI SP_REG))) (match_dup 0))])
 
@@ -20712,7 +20715,7 @@
   [(match_scratch:DI 0 "r")
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -16)))
              (clobber (reg:CC FLAGS_REG))])]
-  "optimize_size || !TARGET_SUB_ESP_8"
+  "optimize_insn_for_size_p () || !TARGET_SUB_ESP_8"
   [(clobber (match_dup 0))
    (set (mem:DI (pre_dec:DI (reg:DI SP_REG))) (match_dup 0))
    (set (mem:DI (pre_dec:DI (reg:DI SP_REG))) (match_dup 0))])
@@ -20723,7 +20726,7 @@
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_ADD_ESP_4"
+  "optimize_insn_for_size_p () || !TARGET_ADD_ESP_4"
   [(parallel [(set (match_dup 0) (mem:DI (reg:DI SP_REG)))
              (set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))
              (clobber (mem:BLK (scratch)))])]
@@ -20737,7 +20740,7 @@
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 16)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size || !TARGET_ADD_ESP_8"
+  "optimize_insn_for_size_p () || !TARGET_ADD_ESP_8"
   [(parallel [(set (match_dup 0) (mem:DI (reg:DI SP_REG)))
              (set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))
              (clobber (mem:BLK (scratch)))])
@@ -20750,7 +20753,7 @@
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 16)))
              (clobber (reg:CC FLAGS_REG))
              (clobber (mem:BLK (scratch)))])]
-  "optimize_size"
+  "optimize_insn_for_size_p ()"
   [(parallel [(set (match_dup 0) (mem:DI (reg:DI SP_REG)))
              (set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))
              (clobber (mem:BLK (scratch)))])
@@ -20786,7 +20789,7 @@
   [(match_scratch:DI 0 "r")
    (parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 16)))
              (clobber (reg:CC FLAGS_REG))])]
-  "optimize_size"
+  "optimize_insn_for_size_p ()"
   [(parallel [(set (match_dup 0) (mem:DI (reg:DI SP_REG)))
              (set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))])
    (parallel [(set (match_dup 0) (mem:DI (reg:DI SP_REG)))
@@ -20814,7 +20817,7 @@
           (mult:SI (match_operand:SI 1 "nonimmediate_operand" "")
                    (match_operand:SI 2 "const_int_operand" "")))
      (clobber (reg:CC FLAGS_REG))])]
-  "!optimize_size
+  "optimize_insn_for_speed_p ()
    && (INTVAL (operands[2]) == 3
        || INTVAL (operands[2]) == 5
        || INTVAL (operands[2]) == 9)"
@@ -20846,7 +20849,7 @@
                    (match_operand:DI 2 "const_int_operand" "")))
      (clobber (reg:CC FLAGS_REG))])]
   "TARGET_64BIT
-   && !optimize_size
+   && optimize_insn_for_speed_p ()
    && (INTVAL (operands[2]) == 3
        || INTVAL (operands[2]) == 5
        || INTVAL (operands[2]) == 9)"
@@ -20864,7 +20867,7 @@
                   (mult:DI (match_operand:DI 1 "memory_operand" "")
                            (match_operand:DI 2 "immediate_operand" "")))
              (clobber (reg:CC FLAGS_REG))])]
-  "TARGET_SLOW_IMUL_IMM32_MEM && !optimize_size
+  "TARGET_SLOW_IMUL_IMM32_MEM && optimize_insn_for_speed_p ()
    && !satisfies_constraint_K (operands[2])"
   [(set (match_dup 3) (match_dup 1))
    (parallel [(set (match_dup 0) (mult:DI (match_dup 3) (match_dup 2)))
@@ -20877,7 +20880,7 @@
                   (mult:SI (match_operand:SI 1 "memory_operand" "")
                            (match_operand:SI 2 "immediate_operand" "")))
              (clobber (reg:CC FLAGS_REG))])]
-  "TARGET_SLOW_IMUL_IMM32_MEM && !optimize_size
+  "TARGET_SLOW_IMUL_IMM32_MEM && optimize_insn_for_speed_p ()
    && !satisfies_constraint_K (operands[2])"
   [(set (match_dup 3) (match_dup 1))
    (parallel [(set (match_dup 0) (mult:SI (match_dup 3) (match_dup 2)))
@@ -20891,7 +20894,7 @@
                     (mult:SI (match_operand:SI 1 "memory_operand" "")
                              (match_operand:SI 2 "immediate_operand" ""))))
              (clobber (reg:CC FLAGS_REG))])]
-  "TARGET_SLOW_IMUL_IMM32_MEM && !optimize_size
+  "TARGET_SLOW_IMUL_IMM32_MEM && optimize_insn_for_speed_p ()
    && !satisfies_constraint_K (operands[2])"
   [(set (match_dup 3) (match_dup 1))
    (parallel [(set (match_dup 0) (zero_extend:DI (mult:SI (match_dup 3) (match_dup 2))))
@@ -20908,7 +20911,7 @@
                            (match_operand:DI 2 "const_int_operand" "")))
              (clobber (reg:CC FLAGS_REG))])
    (match_scratch:DI 3 "r")]
-  "TARGET_SLOW_IMUL_IMM8 && !optimize_size
+  "TARGET_SLOW_IMUL_IMM8 && optimize_insn_for_speed_p ()
    && satisfies_constraint_K (operands[2])"
   [(set (match_dup 3) (match_dup 2))
    (parallel [(set (match_dup 0) (mult:DI (match_dup 0) (match_dup 3)))
@@ -20924,7 +20927,7 @@
                            (match_operand:SI 2 "const_int_operand" "")))
              (clobber (reg:CC FLAGS_REG))])
    (match_scratch:SI 3 "r")]
-  "TARGET_SLOW_IMUL_IMM8 && !optimize_size
+  "TARGET_SLOW_IMUL_IMM8 && optimize_insn_for_speed_p ()
    && satisfies_constraint_K (operands[2])"
   [(set (match_dup 3) (match_dup 2))
    (parallel [(set (match_dup 0) (mult:SI (match_dup 0) (match_dup 3)))
@@ -20940,7 +20943,7 @@
                            (match_operand:HI 2 "immediate_operand" "")))
              (clobber (reg:CC FLAGS_REG))])
    (match_scratch:HI 3 "r")]
-  "TARGET_SLOW_IMUL_IMM8 && !optimize_size"
+  "TARGET_SLOW_IMUL_IMM8 && optimize_insn_for_speed_p ()"
   [(set (match_dup 3) (match_dup 2))
    (parallel [(set (match_dup 0) (mult:HI (match_dup 0) (match_dup 3)))
              (clobber (reg:CC FLAGS_REG))])]