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* config/mips/mips.md (UNSPEC_MOVE_TF_PS): New.
authorrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 29 Aug 2004 10:01:28 +0000 (10:01 +0000)
committerrsandifo <rsandifo@138bc75d-0d04-0410-961f-82ee72b054a4>
Sun, 29 Aug 2004 10:01:28 +0000 (10:01 +0000)
* config/mips/mips-ps-3d.md (mips_cond_move_tf_ps): Express as an
UNSPEC rather than an IF_THEN_ELSE.
* config/mips/mips.c (mips_expand_ps_cond_move_builtin): Emit
mips_cond_move_tf_ps by name.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@86714 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/mips/mips-ps-3d.md
gcc/config/mips/mips.c
gcc/config/mips/mips.md

index 0f2018f..903555b 100644 (file)
@@ -1,3 +1,11 @@
+2004-08-29  Richard Sandiford  <rsandifo@redhat.com>
+
+       * config/mips/mips.md (UNSPEC_MOVE_TF_PS): New.
+       * config/mips/mips-ps-3d.md (mips_cond_move_tf_ps): Express as an
+       UNSPEC rather than an IF_THEN_ELSE.
+       * config/mips/mips.c (mips_expand_ps_cond_move_builtin): Emit
+       mips_cond_move_tf_ps by name.
+
 2004-08-29  Chao-ying Fu  <fu@mips.com>
            James E Wilson  <wilson@specifixinc.com>
        
index 481310c..0f7a76f 100644 (file)
 
 (define_insn "mips_cond_move_tf_ps"
   [(set (match_operand:V2SF 0 "register_operand" "=f,f")
-       (if_then_else:V2SF
-        (eq:CCV2 (match_operand:CCV2 3 "register_operand" "z,z") (const_int 0))
-        (match_operand:V2SF 1 "register_operand" "f,0")
-        (match_operand:V2SF 2 "register_operand" "0,f")))]
+       (unspec:V2SF [(match_operand:V2SF 1 "register_operand" "f,0")
+                     (match_operand:V2SF 2 "register_operand" "0,f")
+                     (match_operand:CCV2 3 "register_operand" "z,z")]
+                    UNSPEC_MOVE_TF_PS))]
   "TARGET_PAIRED_SINGLE_FLOAT"
   "@
     movt.ps\t%0,%1,%y3
index 6508639..b2410a0 100644 (file)
@@ -10688,7 +10688,8 @@ mips_expand_ps_cond_move_builtin (enum mips_cmp_choice cmp_choice,
   enum machine_mode mode0;
   enum machine_mode mode1;
   rtx temp_target;
-  rtx if_then_else;
+  rtx src1;
+  rtx src2;
   enum rtx_code test_code;
   int compare_value;
 
@@ -10745,28 +10746,20 @@ mips_expand_ps_cond_move_builtin (enum mips_cmp_choice cmp_choice,
   switch (cmp_choice)
     {
     case MIPS_CMP_MOVT:
-      if_then_else 
-       = gen_rtx_IF_THEN_ELSE (tmode,
-                               gen_rtx_fmt_ee (test_code, CCV2mode, 
-                                               temp_target,
-                                               GEN_INT (compare_value)),
-                               op3, target);
+      src1 = op3;
+      src2 = target;
       break;
 
     case MIPS_CMP_MOVF:
-      if_then_else 
-       = gen_rtx_IF_THEN_ELSE (tmode,
-                               gen_rtx_fmt_ee (test_code, CCV2mode, 
-                                               temp_target,
-                                               GEN_INT (compare_value)), 
-                               target, op3);
+      src1 = target;
+      src2 = op3;
       break;
 
     default:
       return 0;
     }
 
-  emit_insn (gen_rtx_SET (VOIDmode, target, if_then_else)); 
+  emit_insn (gen_mips_cond_move_tf_ps (target, src1, src2, temp_target));
 
   return target;
 }
index 664f031..5f5d7e4 100644 (file)
    (UNSPEC_RSQRT2_D            248)
    (UNSPEC_RSQRT2_PS           249)
 
+   (UNSPEC_MOVE_TF_PS          250)
   ]
 )