Fix misscheduling of epilogue predicate register restore.

	* config/ia64/ia64.c (rtx_needs_barrier, case UNSPEC): Move case 6...
	(rtx_needs_barrier, case UNSPEC_VOLATILE): to here.
	* config/ia64/ia64.md (pr_restore): Change UNSPEC to UNSPEC_VOLATILE.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@32714 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0b6e866..f6fcab1 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+Thu Mar 23 11:34:39 2000  Jim Wilson  <wilson@cygnus.com>
+
+       * config/ia64/ia64.c (rtx_needs_barrier, case UNSPEC): Move case 6...
+       (rtx_needs_barrier, case UNSPEC_VOLATILE): to here.
+       * config/ia64/ia64.md (pr_restore): Change UNSPEC to UNSPEC_VOLATILE.
+
 Thu Mar 23 16:04:40 2000  Andrew Haley  <aph@cygnus.com>
 
         * config/mips/mips.md (movdf_internal1a): Delete (set 'f', 'F')

diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c
index 9de15ab..9c3b1f8 100644 (file)
--- a/gcc/config/ia64/ia64.c
+++ b/gcc/config/ia64/ia64.c
@@ -2421,16 +2421,7 @@ rtx_needs_barrier (x, flags, pred)
            need_barrier |= rws_access_reg (i, flags, pred);
          break;
 
-       case 6: /* mov pr= */
-         /* This writes all predicate registers.  */
-         new_flags.is_write = 1;
-         /* We need to skip by two, because rws_access_reg always writes
-            to two predicate registers at a time.  */
-         /* ??? Strictly speaking, we shouldn't be counting writes to pr0.  */
-         for (i = PR_REG (0); i < PR_REG (64); i += 2)
-           need_barrier |= rws_access_reg (i, new_flags, pred);
-         break;
-
+       case 6:
        case 7:
          abort ();
 
@@ -2486,6 +2477,16 @@ rtx_needs_barrier (x, flags, pred)
          need_barrier = rws_access_reg (REG_AR_PFS, new_flags, pred);
          break;
 
+       case 6: /* mov pr= */
+         /* This writes all predicate registers.  */
+         new_flags.is_write = 1;
+         /* We need to skip by two, because rws_access_reg always writes
+            to two predicate registers at a time.  */
+         /* ??? Strictly speaking, we shouldn't be counting writes to pr0.  */
+         for (i = PR_REG (0); i < PR_REG (64); i += 2)
+           need_barrier |= rws_access_reg (i, new_flags, pred);
+         break;
+
        default:
          abort ();
        }

diff --git a/gcc/config/ia64/ia64.md b/gcc/config/ia64/ia64.md
index 0471357..d3df3cb 100644 (file)
--- a/gcc/config/ia64/ia64.md
+++ b/gcc/config/ia64/ia64.md
@@ -3049,8 +3049,11 @@
   "mov %0 = pr"
   [(set_attr "type" "I")])
 
+;; ??? This is volatile to prevent it from being moved before a conditional
+;; expression that calculates the return value.
+
 (define_insn "pr_restore"
-  [(unspec [(const_int 0)] 6)
+  [(unspec_volatile [(const_int 0)] 6)
    (use (match_operand:DI 0 "register_operand" "r"))]
   ""
   "mov pr = %0, -1"