* config/mips/mips.md (trap) [TARGET_MIPS16]: Emit `break 0'.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@50898
138bc75d-0d04-0410-961f-
82ee72b054a4
2002-03-16 Alexandre Oliva <aoliva@redhat.com>
+ * config/mips/mips.h (ISA_HAS_COND_TRAP): Not available on MIPS16.
+ * config/mips/mips.md (trap) [TARGET_MIPS16]: Emit `break 0'.
+
* config/mips/mips.md (addsi3, adddi3): Use scratch register to
add register to non-constant into sp.
)
/* ISA has conditional trap instructions. */
-#define ISA_HAS_COND_TRAP (mips_isa >= 2)
+#define ISA_HAS_COND_TRAP (mips_isa >= 2 && ! TARGET_MIPS16)
/* ISA has multiply-accumulate instructions, madd and msub. */
#define ISA_HAS_MADD_MSUB (mips_isa == 32 \
{
if (ISA_HAS_COND_TRAP)
return \"teq\\t$0,$0\";
+ else if (TARGET_MIPS16)
+ return \"break 0\";
else
return \"break\";
}")