2002-06-12 Eric Christopher <echristo@redhat.com>

	From Chris Demetriou  <cgd@broadcom.com>
	* config/mips/mips.h (ISA_HAS_FP4): Add ISA_MIPS64 and fix
	comment.
	(ISA_HAS_MADD_MSUB): Ditto.
	(ISA_HAS_NMADD_NMSUB): Ditto.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@54569 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4e7a821..79dd06e 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,13 @@
 2002-06-12  Eric Christopher  <echristo@redhat.com>
 
+       From Chris Demetriou  <cgd@broadcom.com>
+       * config/mips/mips.h (ISA_HAS_FP4): Add ISA_MIPS64 and fix
+       comment.
+       (ISA_HAS_MADD_MSUB): Ditto.
+       (ISA_HAS_NMADD_NMSUB): Ditto.
+
+2002-06-12  Eric Christopher  <echristo@redhat.com>
+
        * config.gcc: Consolidate little endian handling and
        little/big endian targets.
        * config/mips/elfl.h: Remove file.

diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index b68840f..7778361 100644 (file)
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -751,22 +751,24 @@ extern void               sbss_section PARAMS ((void));
                                 || ISA_MIPS64)
 
 /* This is a catch all for the other new mips4 instructions: indexed load and
-   indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub instructions,
-   and the FP recip and recip sqrt instructions */
-#define ISA_HAS_FP4             (ISA_MIPS4                             \
+   indexed prefetch instructions, the FP madd,msub,nmadd, and nmsub
+   instructions, and the FP recip and recip sqrt instructions */
+#define ISA_HAS_FP4             ((ISA_MIPS4                            \
+                                 || ISA_MIPS64)                        \
                                 && !TARGET_MIPS16)
 
 /* ISA has conditional trap instructions.  */
 #define ISA_HAS_COND_TRAP      (!ISA_MIPS1                             \
                                 && !TARGET_MIPS16)
 
-/* ISA has multiply-accumulate instructions, madd and msub.  */
+/* ISA has integer multiply-accumulate instructions, madd and msub.  */
 #define ISA_HAS_MADD_MSUB       ((ISA_MIPS32                           \
                                  || ISA_MIPS64                         \
                                  ) && !TARGET_MIPS16)
 
-/* ISA has nmadd and nmsub instructions.  */
-#define ISA_HAS_NMADD_NMSUB    (ISA_MIPS4                              \
+/* ISA has floating-point nmadd and nmsub instructions.  */
+#define ISA_HAS_NMADD_NMSUB    ((ISA_MIPS4                             \
+                                 || ISA_MIPS64)                        \
                                 && ! TARGET_MIPS16)
 
 /* ISA has count leading zeroes/ones instruction (not implemented).  */