extern int flag_traditional;
extern FILE *asm_out_file;
-static char out_sccs_id[] = "@(#)m88k.c 2.0.2.2 02 Mar 1992 13:30:28";
+static char out_sccs_id[] = "@(#)m88k.c 2.0.3.4 19 Mar 1992 11:11:58";
static char tm_sccs_id [] = TM_SCCS_ID;
char *m88k_pound_sign = ""; /* Either # for SVR4 or empty for SVR3 */
ASM_GENERATE_INTERNAL_LABEL
(low, "L", CODE_LABEL_NUMBER (XEXP (sb_low, 0)));
/* This will change as the assembler requirements become known. */
- fprintf (stream, "%s\t %s,%s-%s\n",
+ fprintf (stream, "\t%s\t %s,%s-%s\n",
DEF_ASM_OP, &name[1], &high[1], &low[1]);
}
if (sb_name || sb_high || sb_low)
char indent[256];
time_t now = time ((time_t *)0);
- sprintf (indent, "]\"\n%s\t \"@(#)%s [", IDENT_ASM_OP, main_input_filename);
+ sprintf (indent, "]\"\n\t%s\t \"@(#)%s [", IDENT_ASM_OP, main_input_filename);
fprintf (file, indent+3);
pos = fprintf (file, "gcc %s, %.24s,", VERSION_STRING, ctime (&now));
output_options (file, f_options, f_len, W_options, W_len,
register int num = 0;
- fprintf (file, "%s\t \"", ASCII_DATA_ASM_OP);
+ fprintf (file, "\t%s\t \"", ASCII_DATA_ASM_OP);
for (i = 0; i < size; i++)
{
register int c = p[i];
if (num > 48)
{
- fprintf (file, "\"\n%s\t \"", ASCII_DATA_ASM_OP);
+ fprintf (file, "\"\n\t%s\t \"", ASCII_DATA_ASM_OP);
num = 0;
}
{
if (state == ps_name || state == ps_value)
{
- fprintf (asm_out_file, "%s\t ", WEAK_ASM_OP);
+ fprintf (asm_out_file, "\t%s\t ", WEAK_ASM_OP);
ASM_OUTPUT_LABELREF (asm_out_file, name);
fputc ('\n', asm_out_file);
if (state == ps_value)
{
- fprintf (asm_out_file, "%s\t ", DEF_ASM_OP);
+ fprintf (asm_out_file, "\t%s\t ", DEF_ASM_OP);
ASM_OUTPUT_LABELREF (asm_out_file, name);
fputc (',', asm_out_file);
ASM_OUTPUT_LABELREF (asm_out_file, value);
tdesc_section ();
- fprintf (file, "%s\t %d", INT_ASM_OP, (16 << 2) | 2 /* 8:0,22:16,2:2 */);
+ fprintf (file, "\t%s\t %d", INT_ASM_OP, (16 << 2) | 2 /* 8:0,22:16,2:2 */);
fprintf (file, ",%d", flag_pic ? 2 : 1);
ASM_GENERATE_INTERNAL_LABEL (buf, OCS_START_PREFIX, m88k_function_number);
}
/* Allocate the va_list constructor */
- block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_UNIT);
+ block = assign_stack_local (BLKmode, 3 * UNITS_PER_WORD, BITS_PER_WORD);
RTX_UNCHANGING_P (block) = 1;
RTX_UNCHANGING_P (XEXP (block, 0)) = 1;
/* Print subsidiary information on the compiler version in use.
Redefined in m88kv4.h, and m88kluna.h. */
#define VERSION_INFO1 "88open OCS/BCS, "
-#define VERSION_INFO2 "09 Mar 1992"
+#define VERSION_INFO2 "19 Mar 1992"
#define VERSION_STRING version_string
-#define TM_SCCS_ID "@(#)m88k.h 2.0.2.3 09 Mar 1992 14:20:23"
+#define TM_SCCS_ID "@(#)m88k.h 2.0.3.5 19 Mar 1992 12:40:46"
/* Run-time compilation parameters selecting different hardware subsets. */
/* The singl-byte pseudo-op is the default. Override svr[34].h. */
#undef ASM_BYTE_OP
-#define ASM_BYTE_OP "byte"
+#define ASM_BYTE_OP "\tbyte"
#undef ASM_OUTPUT_ASCII
#define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
output_ascii ((FILE), (P), (SIZE))
(define_expand "m88k_sccs_id"
[(match_operand:SI 0 "" "")]
""
- "{ static char sccs_id[] = \"@(#)m88k.md 2.0.2.1 28 Feb 1992 12:38:31\";
+ "{ static char sccs_id[] = \"@(#)m88k.md 2.0.3.3 18 Mar 1992 15:40:12\";
FAIL; }")
\f
;; Attribute specifications
; Target CPU.
(define_attr "cpu" "m88000,m88100,m88110"
- (symbol_ref "m88k_cpu"))
+ (const (symbol_ref "m88k_cpu")))
; Type of each instruction. Default is arithmetic.
; I'd like to write the list as this, but genattrtab won't accept it.
; Describing stores is currently not useful. The suggestion here is that the
; function unit ordering has already been established (writeback is last) and
-; that store insns use the units in an unusal order.
+; that store insns use the units in an unusual order.
;(define_function_unit "writeback" 1 1 (eq_attr "type" "store,mstore") 0 1)
;(define_function_unit "memory" 1 3 (eq_attr "type" "store,mstore") 1 2)
\f
(match_operand:SI 2 "int5_operand" ""))
(match_operand:SI 3 "int5_operand" "")))]
"INTVAL (operands [2]) <= INTVAL (operands [3])"
- "ext %0,%1,%w3<(%3-%2)>")
+ "*
+{
+ operands[4] = gen_rtx (CONST_INT, SImode,
+ INTVAL (operands[3]) - INTVAL (operands[2]));
+ return \"ext %0,%1,%w3<%4>\"; /* <(%3-%2)> */
+}")
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 2 "int5_operand" ""))
(match_operand:SI 3 "int5_operand" "")))]
"INTVAL (operands [2]) <= INTVAL (operands [3])"
- "extu %0,%1,%w3<(%3-%2)>")
+ "*
+{
+ operands[4] = gen_rtx (CONST_INT, SImode,
+ INTVAL (operands[3]) - INTVAL (operands[2]));
+ return \"extu %0,%1,%w3<%4>\"; /* <(%3-%2)> */
+}")
;; Optimize possible cases of the set instruction.
(match_operand:SI 2 "int5_operand" "")
(match_operand:SI 3 "int5_operand" "")))]
""
- "ext %0,%1,%2<(32-%2-%3)>")
+ "*
+{
+ operands[4] = gen_rtx (CONST_INT, SImode,
+ (32 - INTVAL (operands[2])) - INTVAL (operands[3]));
+ return \"ext %0,%1,%2<%4>\"; /* <(32-%2-%3)> */
+}")
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r")
(match_operand:SI 2 "int5_operand" "")
(match_operand:SI 3 "int5_operand" "")))]
""
- "extu %0,%1,%2<(32-%2-%3)>")
+ "*
+{
+ operands[4] = gen_rtx (CONST_INT, SImode,
+ (32 - INTVAL (operands[2])) - INTVAL (operands[3]));
+ return \"extu %0,%1,%2<%4>\"; /* <(32-%2-%3)> */
+}")
(define_insn ""
[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
(match_operand:SI 2 "int5_operand" ""))
(const_int 0))]
""
- "clr %0,%0,%1<(32-%1-%2)>")
+ "*
+{
+ operands[3] = gen_rtx (CONST_INT, SImode,
+ (32 - INTVAL (operands[1])) - INTVAL (operands[2]));
+ return \"clr %0,%0,%1<%3>\"; /* <(32-%1-%2)> */
+}")
(define_insn ""
[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "r")
(match_operand:SI 2 "int5_operand" ""))
(const_int -1))]
""
- "set %0,%0,%1<(32-%1-%2)>")
+ "*
+{
+ operands[3] = gen_rtx (CONST_INT, SImode,
+ (32 - INTVAL (operands[1])) - INTVAL (operands[2]));
+ return \"set %0,%0,%1<%3>\"; /* <(32-%1-%2)> */
+}")
(define_insn ""
[(set (zero_extract:SI (match_operand:SI 0 "register_operand" "=r")