* config/mips.c (mips_conditional_register_usage): Handle the

        DSP control register.
        * doc/extend.texi: Document the DSP control register.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@141568 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0d698b9..ea8aed4 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2008-11-03  Catherine Moore  <clm@codesourcery.com>
+
+       * config/mips.c (mips_conditional_register_usage):  Handle the
+       DSP control register.
+       * doc/extend.texi: Document the DSP control register.
+                           
 2008-11-03  Steve Ellcey <sje@cup.hp.com>
            Jakub Jelinek  <jakub@redhat.com>
 

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index f566e03..fa78c8b 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -14019,7 +14019,14 @@ mips_swap_registers (unsigned int i)
 void
 mips_conditional_register_usage (void)
 {
-  if (!ISA_HAS_DSP)
+
+  if (ISA_HAS_DSP)
+    {
+      /* These DSP control register fields are global.  */
+      global_regs[CCDSP_PO_REGNUM] = 1;
+      global_regs[CCDSP_SC_REGNUM] = 1;
+    }
+  else 
     {
       int regno;
 

diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index da9c1da..e03eaf9 100644 (file)
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -8698,6 +8698,12 @@ otherwise backwards-compatible with it.  You can select revision 2
 using the command-line option @option{-mdspr2}; this option implies
 @option{-mdsp}.
 
+The SCOUNT and POS bits of the DSP control register are global.  The
+WRDSP, EXTPDP, EXTPDPV and MTHLIP instructions modify the SCOUNT and
+POS bits.  During optimization, the compiler will not delete these
+instructions and it will not delete calls to functions containing
+these instructions.
+
 At present, GCC only provides support for operations on 32-bit
 vectors.  The vector type associated with 8-bit integer data is
 usually called @code{v4i8}, the vector type associated with Q7