2009-02-12 H.J. Lu <hongjiu.lu@intel.com>

	* config/i386/i386.c (construct_container): Rewrite processing
	BLKmode with X86_64_SSE_CLASS.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@144128 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6efef4c..4a8c282 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2009-02-12  H.J. Lu  <hongjiu.lu@intel.com>
+
+       * config/i386/i386.c (construct_container): Rewrite processing
+       BLKmode with X86_64_SSE_CLASS.
+
 2009-02-12  Paolo Bonzini  <bonzini@gnu.org>
 
        PR target/39152

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 3e02102..709d7d3 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -5315,6 +5315,8 @@ construct_container (enum machine_mode mode, enum machine_mode orig_mode,
   /* Otherwise figure out the entries of the PARALLEL.  */
   for (i = 0; i < n; i++)
     {
+      int pos;
+
       switch (regclass[i])
         {
          case X86_64_NO_CLASS:
@@ -5351,24 +5353,36 @@ construct_container (enum machine_mode mode, enum machine_mode orig_mode,
            sse_regno++;
            break;
          case X86_64_SSE_CLASS:
-           if (i < n - 1 && regclass[i + 1] == X86_64_SSEUP_CLASS)
+           pos = i;
+           switch (n)
              {
-               if (regclass[i + 2] == X86_64_SSEUP_CLASS
-                   || regclass[i + 3] == X86_64_SSEUP_CLASS)
-                 tmpmode = OImode;
+             case 1:
+               tmpmode = DImode;
+               break;
+             case 2:
+               if (i == 0 && regclass[1] == X86_64_SSEUP_CLASS)
+                 {
+                   tmpmode = TImode;
+                   i++;
+                 }
                else
-                 tmpmode = TImode;
+                 tmpmode = DImode;
+               break;
+             case 4:
+               gcc_assert (i == 0
+                           && regclass[1] == X86_64_SSEUP_CLASS
+                           && regclass[2] == X86_64_SSEUP_CLASS
+                           && regclass[3] == X86_64_SSEUP_CLASS);
+               tmpmode = OImode;
+               i += 3;
+               break;
+             default:
+               gcc_unreachable ();
              }
-           else
-             tmpmode = DImode;
            exp [nexps++] = gen_rtx_EXPR_LIST (VOIDmode,
                                               gen_rtx_REG (tmpmode,
                                                            SSE_REGNO (sse_regno)),
-                                              GEN_INT (i*8));
-           if (tmpmode == OImode)
-             i += 3;
-           else if (tmpmode == TImode)
-             i++;
+                                              GEN_INT (pos*8));
            sse_regno++;
            break;
          default: