Allow SUBREGs in place of REGs in soft_df_operand and di_operand

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@26336 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fc06842..f50a947 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Sat Apr 10 13:09:18 1999  Nick Clifton  <nickc@cygnus.com>
+
+       * config/arm/arm.c (di_operand): Allow SUBREGs as well.
+       (soft_df_operand): Allow SUBREGs as well.
+
 Sat Apr 10 06:14:31 1999  Jan Hubicka  <hubicka@paru.cas.cz>
 
        * extend.texi (Assembler Instructions with C Expression Operands):

diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 52257ba..d84efe7 100644 (file)
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -2192,7 +2192,7 @@ power_of_two_operand (op, mode)
 }
 
 /* Return TRUE for a valid operand of a DImode operation.
-   Either: REG, CONST_DOUBLE or MEM(DImode_address).
+   Either: REG, SUBREG, CONST_DOUBLE or MEM(DImode_address).
    Note that this disallows MEM(REG+REG), but allows
    MEM(PRE/POST_INC/DEC(REG)).  */
 
@@ -2204,6 +2204,9 @@ di_operand (op, mode)
   if (s_register_operand (op, mode))
     return TRUE;
 
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+
   switch (GET_CODE (op))
     {
     case CONST_DOUBLE:
@@ -2219,7 +2222,7 @@ di_operand (op, mode)
 }
 
 /* Return TRUE for a valid operand of a DFmode operation when -msoft-float.
-   Either: REG, CONST_DOUBLE or MEM(DImode_address).
+   Either: REG, SUBREG, CONST_DOUBLE or MEM(DImode_address).
    Note that this disallows MEM(REG+REG), but allows
    MEM(PRE/POST_INC/DEC(REG)).  */
 
@@ -2231,6 +2234,9 @@ soft_df_operand (op, mode)
   if (s_register_operand (op, mode))
     return TRUE;
 
+  if (GET_CODE (op) == SUBREG)
+    op = SUBREG_REG (op);
+
   switch (GET_CODE (op))
     {
     case CONST_DOUBLE: