Some sh.md fixes (fallout from earlier changes)

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@36535 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index f9ac0d7..c0a4253 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2000-09-19  Bernd Schmidt  <bernds@redhat.co.uk>
+
+       Fix misapplied earlier patch:
+       * config/sh/sh.md (floatsisf_ie): Reenable.  Remove explicit reference
+       to fpul.
+       (floatsisf2): Generate floatsisf_ie by default.
+       (floatsisf_i4): Conditional on TARGET_SH4.
+
+       (floatsisf2, floatsidf2, extendsfdf2): Also use reg_no_subreg_operand
+       predicate for the expanders.
+
 2000-09-19  Richard Henderson  <rth@cygnus.com>
 
        * config/i386/i386.h (CPP_CPU_SPEC): Define i586 and i686 symbols

diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 59ec818..70510bd 100644 (file)
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -4219,9 +4219,8 @@ else
    (set_attr "fp_mode" "single")])
 
 (define_expand "floatsisf2"
-  [(parallel [(set (match_operand:SF 0 "arith_reg_operand" "")
-                  (float:SF (match_operand:SI 1 "arith_reg_operand" "")))
-             (use (match_dup 2))])]
+  [(set (match_operand:SF 0 "arith_reg_operand" "")
+       (float:SF (match_operand:SI 1 "reg_no_subreg_operand" "")))]
   "TARGET_SH3E"
   "
 {
@@ -4230,25 +4229,23 @@ else
       emit_sf_insn (gen_floatsisf2_i4 (operands[0], operands[1], get_fpscr_rtx ()));
       DONE;
     }
-  operands[2] = get_fpscr_rtx ();
 }")
 
 (define_insn "floatsisf2_i4"
   [(set (match_operand:SF 0 "arith_reg_operand" "=f")
        (float:SF (match_operand:SI 1 "reg_no_subreg_operand" "y")))
    (use (match_operand:PSI 2 "fpscr_operand" "c"))]
-  "TARGET_SH3E"
+  "TARGET_SH4"
   "float       %1,%0"
   [(set_attr "type" "fp")
    (set_attr "fp_mode" "single")])
 
-;; ??? This pattern is used nowhere.  floatsisf always expands to floatsisf_i4.
-;; (define_insn "*floatsisf2_ie"
-;;  [(set (match_operand:SF 0 "arith_reg_operand" "=f")
-;;     (float:SF (reg:SI 22)))]
-;;  "TARGET_SH3E && ! TARGET_SH4"
-;;  "float     fpul,%0"
-;;  [(set_attr "type" "fp")])
+(define_insn "*floatsisf2_ie"
+  [(set (match_operand:SF 0 "arith_reg_operand" "=f")
+       (float:SF (match_operand:SI 1 "reg_no_subreg_operand" "y")))]
+  "TARGET_SH3E && ! TARGET_SH4"
+  "float       %1,%0"
+  [(set_attr "type" "fp")])
 
 (define_expand "fix_truncsfsi2"
   [(set (match_operand:SI 0 "register_operand" "=y")
@@ -4480,7 +4477,7 @@ else
 
 (define_expand "floatsidf2"
   [(match_operand:DF 0 "arith_reg_operand" "")
-   (match_operand:SI 1 "arith_reg_operand" "")]
+   (match_operand:SI 1 "reg_no_subreg_operand" "")]
   "TARGET_SH4"
   "
 {
@@ -4624,7 +4621,7 @@ else
 
 (define_expand "extendsfdf2"
   [(match_operand:DF 0 "arith_reg_operand" "")
-   (match_operand:SF 1 "arith_reg_operand" "")]
+   (match_operand:SF 1 "reg_no_subreg_operand" "")]
   "TARGET_SH4"
   "
 {