2010-11-02 Bernd Schmidt <bernds@codesourcery.com>
Maxim Kuvyrkov <maxim@codesourcery.com>
+
+ Tune alignment for Intel Core i7
+
+ * config/i386.h (TARGET_COREI7{_32,_64,}): New macros.
+ (enum processor_type): Update comment. Add entries for Core i7.
+ * config/i386-c.c (ix86_target_macros_internal): Update.
+ * config/i386.c (m_COREI7{_32,_64}): New macros.
+ (m_GENERIC32, m_GENERIC64): Use generic tuning for Core i7.
+ (processor_target_table): Tune alignment for Core i7.
+ (ix86_option_override_internal): Use PROCESSOR_COREI7_*.
+
+ * doc/invoke.texi: Document "corei7" option value.
+
+2010-11-02 Bernd Schmidt <bernds@codesourcery.com>
+ Maxim Kuvyrkov <maxim@codesourcery.com>
H.J. Lu <hjl.tools@gmail.com>
Basic support for Intel Core i7
def_or_undef (parse_in, "__core2");
def_or_undef (parse_in, "__core2__");
break;
+ case PROCESSOR_COREI7_32:
+ case PROCESSOR_COREI7_64:
+ def_or_undef (parse_in, "__corei7");
+ def_or_undef (parse_in, "__corei7__");
+ break;
case PROCESSOR_ATOM:
def_or_undef (parse_in, "__atom");
def_or_undef (parse_in, "__atom__");
case PROCESSOR_CORE2:
def_or_undef (parse_in, "__tune_core2__");
break;
+ case PROCESSOR_COREI7_32:
+ case PROCESSOR_COREI7_64:
+ def_or_undef (parse_in, "__tune_corei7__");
+ break;
case PROCESSOR_ATOM:
def_or_undef (parse_in, "__tune_atom__");
break;
#define m_PENT4 (1<<PROCESSOR_PENTIUM4)
#define m_NOCONA (1<<PROCESSOR_NOCONA)
#define m_CORE2 (1<<PROCESSOR_CORE2)
+#define m_COREI7_32 (1<<PROCESSOR_COREI7_32)
+#define m_COREI7_64 (1<<PROCESSOR_COREI7_64)
#define m_ATOM (1<<PROCESSOR_ATOM)
#define m_GEODE (1<<PROCESSOR_GEODE)
#define m_BDVER1 (1<<PROCESSOR_BDVER1)
#define m_AMD_MULTIPLE (m_K8 | m_ATHLON | m_AMDFAM10 | m_BDVER1)
-#define m_GENERIC32 (1<<PROCESSOR_GENERIC32)
-#define m_GENERIC64 (1<<PROCESSOR_GENERIC64)
+#define m_GENERIC32 (1<<PROCESSOR_GENERIC32 | m_COREI7_32)
+#define m_GENERIC64 (1<<PROCESSOR_GENERIC64 | m_COREI7_64)
/* Generic instruction choice should be common subset of supported CPUs
(PPro/PENT4/NOCONA/CORE2/Athlon/K8). */
{&k8_cost, 16, 7, 16, 7, 16},
{&nocona_cost, 0, 0, 0, 0, 0},
{&core2_cost, 16, 10, 16, 10, 16},
+ /* Core i7 32-bit. */
+ {&generic32_cost, 16, 10, 16, 10, 16},
+ /* Core i7 64-bit. */
+ {&generic64_cost, 16, 10, 16, 10, 16},
{&generic32_cost, 16, 7, 16, 7, 16},
{&generic64_cost, 16, 10, 16, 10, 16},
{&amdfam10_cost, 32, 24, 32, 7, 32},
{"core2", PROCESSOR_CORE2, CPU_CORE2,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
| PTA_SSSE3 | PTA_CX16},
- {"corei7", PROCESSOR_GENERIC64, CPU_GENERIC64,
+ {"corei7", PROCESSOR_COREI7_64, CPU_GENERIC64,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16},
{"atom", PROCESSOR_ATOM, CPU_ATOM,
ix86_schedule = CPU_PENTIUMPRO;
break;
+ case PROCESSOR_COREI7_64:
+ ix86_tune = PROCESSOR_COREI7_32;
+ ix86_schedule = CPU_PENTIUMPRO;
+ break;
+
default:
break;
}
#define TARGET_ATHLON_K8 (TARGET_K8 || TARGET_ATHLON)
#define TARGET_NOCONA (ix86_tune == PROCESSOR_NOCONA)
#define TARGET_CORE2 (ix86_tune == PROCESSOR_CORE2)
+#define TARGET_COREI7_32 (ix86_tune == PROCESSOR_COREI7_32)
+#define TARGET_COREI7_64 (ix86_tune == PROCESSOR_COREI7_64)
+#define TARGET_COREI7 (TARGET_COREI7_32 || TARGET_COREI7_64)
#define TARGET_GENERIC32 (ix86_tune == PROCESSOR_GENERIC32)
#define TARGET_GENERIC64 (ix86_tune == PROCESSOR_GENERIC64)
#define TARGET_GENERIC (TARGET_GENERIC32 || TARGET_GENERIC64)
"call " CRT_MKSTR(__USER_LABEL_PREFIX__) #FUNC "\n" \
TEXT_SECTION_ASM_OP);
\f
-/* Which processor to schedule for. The cpu attribute defines a list that
- mirrors this list, so changes to i386.md must be made at the same time. */
+/* Which processor to tune code generation for. */
enum processor_type
{
PROCESSOR_K8,
PROCESSOR_NOCONA,
PROCESSOR_CORE2,
+ PROCESSOR_COREI7_32,
+ PROCESSOR_COREI7_64,
PROCESSOR_GENERIC32,
PROCESSOR_GENERIC64,
PROCESSOR_AMDFAM10,