PR rtl-optimization/32293

	* combine.c (simplify_if_then_else): Truncate return from
	nonzero_bits() to correct mode.

testsuite/ChangeLog:

	PR rtl-optimization/32293
	* gcc.dg/pr32293.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125643 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a36f359..1125e95 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,11 @@
 2007-06-12  Uros Bizjak  <ubizjak@gmail.com>
 
+       PR rtl-optimization/32293
+       * combine.c (simplify_if_then_else): Truncate return from
+       nonzero_bits() to correct mode.
+
+2007-06-12  Uros Bizjak  <ubizjak@gmail.com>
+
        * fold-const (fold_binary) [RDIV_EXPR]: Also optimize a/cbrt(b/c)
        into a*cbrt(c/b) if flag_unsafe_math_optimizations is set.
 

diff --git a/gcc/combine.c b/gcc/combine.c
index d7ac8ad..6fbf816 100644 (file)
--- a/gcc/combine.c
+++ b/gcc/combine.c
@@ -5210,11 +5210,17 @@ simplify_if_then_else (rtx x)
 
       if (true_code == EQ && true_val == const0_rtx
          && exact_log2 (nzb = nonzero_bits (from, GET_MODE (from))) >= 0)
-       false_code = EQ, false_val = GEN_INT (nzb);
+       {
+         false_code = EQ;
+         false_val = GEN_INT (trunc_int_for_mode (nzb, GET_MODE (from)));
+       }
       else if (true_code == EQ && true_val == const0_rtx
               && (num_sign_bit_copies (from, GET_MODE (from))
                   == GET_MODE_BITSIZE (GET_MODE (from))))
-       false_code = EQ, false_val = constm1_rtx;
+       {
+         false_code = EQ;
+         false_val = constm1_rtx;
+       }
 
       /* Now simplify an arm if we know the value of the register in the
         branch and it is used in the arm.  Be careful due to the potential

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 73d6b96..756ac4c 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,10 @@
 2007-06-12  Uros Bizjak  <ubizjak@gmail.com>
 
+       PR rtl-optimization/32293
+       * gcc.dg/pr32293.c: New test.
+
+2007-06-12  Uros Bizjak  <ubizjak@gmail.com>
+
        * gcc.dg/builtins-11.c: Also check folding of a/cbrt(b/c).
 
 2007-06-12  Paul Thomas  <pault@gcc.gnu.org>

diff --git a/gcc/testsuite/gcc.dg/pr32293.c b/gcc/testsuite/gcc.dg/pr32293.c
new file mode 100644 (file)
index 0000000..fb1268b
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr32293.c
@@ -0,0 +1,61 @@
+/* { dg-do compile } */
+/* { dg-options "-O2" } */
+
+unsigned int _IDEC_glbround;
+unsigned int _IDEC_glbflags;
+typedef unsigned UINT32;
+typedef signed SINT32;
+typedef unsigned long long UINT64;
+typedef signed long long SINT64;
+typedef
+__attribute__ ((aligned(16)))
+     struct {
+       UINT64 w[2];
+     } UINT128;
+
+static __inline UINT64
+unpack_BID128 (UINT64 * psign_x, int *pexponent_x,
+        UINT128 * pcoefficient_x, UINT128 * px) {
+  UINT128 coeff;
+  UINT64 ex;
+  *psign_x = (px->w[1]) & 0x8000000000000000ull;
+  ex = (px->w[1]) >> 49;
+  *pexponent_x = ((int) ex) & 0x3fff;
+  return coeff.w[0] | coeff.w[1];
+}
+
+static __inline UINT32
+get_BID32 (UINT32 sgn, int expon, UINT64 coeff, int rmode,
+    unsigned *fpsc) {
+  UINT32 r;
+
+  if (((unsigned) expon) > 191) {
+      r = sgn | 0x78000000ul;
+      switch (rmode) {
+      case 0x00002:
+        if (sgn)
+          r = sgn | 0x77f8967f;
+      }
+      return r;
+  }
+  r = expon;
+  return r;
+}
+
+UINT32
+bid128_to_bid32 (UINT128 x)
+{
+  UINT128 *px;
+  UINT128 CX;
+  UINT64 sign_x;
+  UINT32 res;
+  int exponent_x = 0;
+  px = &x;
+  if (!unpack_BID128 (&sign_x, &exponent_x, &CX, px)) {
+      return(res);
+  }
+  res = get_BID32 ((UINT32) (sign_x >> 32),
+        exponent_x, CX.w[0], _IDEC_glbround, &_IDEC_glbflags);
+  return(res);;
+}
+