2013-05-16 Uros Bizjak <ubizjak@gmail.com>
* config/i386/driver-i386.c (host_detect_local_cpu): Determine
cache parameters using detect_caches_amd also for CYRIX,
NSC and TM2 signatures.
2013-05-16 Uros Bizjak <ubizjak@gmail.com>
Dzianis Kahanovich <mahatma@eu.by>
PR target/45359
PR target/46396
* config/i386/driver-i386.c (host_detect_local_cpu): Detect
VIA/Centaur processors and determine their cache parameters
using detect_caches_amd.
2013-05-15 Uros Bizjak <ubizjak@gmail.com>
* config/i386/i386.c (ix86_option_override_internal): Add
PTA_POPCNT to corei7 entry.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/gcc-4_7-branch@199026
138bc75d-0d04-0410-961f-
82ee72b054a4
+2013-05-17 Uros Bizjak <ubizjak@gmail.com>
+
+ Backport from mainline
+ 2013-05-16 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/driver-i386.c (host_detect_local_cpu): Determine
+ cache parameters using detect_caches_amd also for CYRIX,
+ NSC and TM2 signatures.
+
+ 2013-05-16 Uros Bizjak <ubizjak@gmail.com>
+ Dzianis Kahanovich <mahatma@eu.by>
+
+ PR target/45359
+ PR target/46396
+ * config/i386/driver-i386.c (host_detect_local_cpu): Detect
+ VIA/Centaur processors and determine their cache parameters
+ using detect_caches_amd.
+
+ 2013-05-15 Uros Bizjak <ubizjak@gmail.com>
+
+ * config/i386/i386.c (ix86_option_override_internal): Add
+ PTA_POPCNT to corei7 entry.
+
2013-05-14 Richard Biener <rguenther@suse.de>
PR gcov-profile/57269
2013-05-10 Ralf Corsépius <ralf.corsepius@rtems.org>
- PR target/57237
+ PR target/57237
* config/v850/t-rtems: Add more multilibs.
2013-05-07 Michael Meissner <meissner@linux.vnet.ibm.com>
enum vendor_signatures
{
SIG_INTEL = 0x756e6547 /* Genu */,
- SIG_AMD = 0x68747541 /* Auth */
+ SIG_AMD = 0x68747541 /* Auth */,
+ SIG_CENTAUR = 0x746e6543 /* Cent */,
+ SIG_CYRIX = 0x69727943 /* Cyri */,
+ SIG_NSC = 0x646f6547 /* Geod */
};
enum processor_signatures
if (!arch)
{
- if (vendor == SIG_AMD)
+ if (vendor == SIG_AMD
+ || vendor == SIG_CENTAUR
+ || vendor == SIG_CYRIX
+ || vendor == SIG_NSC)
cache = detect_caches_amd (ext_level);
else if (vendor == SIG_INTEL)
{
else
processor = PROCESSOR_PENTIUM;
}
+ else if (vendor == SIG_CENTAUR)
+ {
+ if (arch)
+ {
+ switch (family)
+ {
+ case 6:
+ if (model > 9)
+ /* Use the default detection procedure. */
+ processor = PROCESSOR_GENERIC32;
+ else if (model == 9)
+ cpu = "c3-2";
+ else if (model >= 6)
+ cpu = "c3";
+ else
+ processor = PROCESSOR_GENERIC32;
+ break;
+ case 5:
+ if (has_3dnow)
+ cpu = "winchip2";
+ else if (has_mmx)
+ cpu = "winchip2-c6";
+ else
+ processor = PROCESSOR_GENERIC32;
+ break;
+ default:
+ /* We have no idea. */
+ processor = PROCESSOR_GENERIC32;
+ }
+ }
+ }
else
{
switch (family)
| PTA_SSSE3 | PTA_CX16},
{"corei7", PROCESSOR_COREI7_64, CPU_COREI7,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
- | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16},
+ | PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_CX16 | PTA_POPCNT},
{"corei7-avx", PROCESSOR_COREI7_64, CPU_COREI7,
PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3
| PTA_SSSE3 | PTA_SSE4_1 | PTA_SSE4_2 | PTA_AVX