cpu_data_buffer = get_bus_data();
end_bus();
+ /*
dprint(" ");
dprint(" ");
dprint("load: @%04x = %02x\n", addr, cpu_data_buffer);
+ */
return cpu_data_buffer;
}
static unsigned char * pattern_tbl0;
static unsigned char * pattern_tbl1;
+//#define PPU_TEST
+#ifdef PPU_TEST
+static int first_time = TRUE;
+#endif /* PPU_TEST */
+
/*
* VRAM get/set functions....
*
addr &= PPU_ADDR_MASK;
if (addr < 2 * PATTERN_TBL_SIZE) {
- dprint("invalid vram write addr:%04x, data:%2x\n", addr, data);
+ //dprint("invalid vram write addr:%04x, data:%2x\n", addr, data);
//do nothing. pattern table is read only.
}
else if (addr >= PALETTE_START) {
/* VRAM manipulation... */
-//#define PPU_TEST
#ifdef PPU_TEST
/*
* ppu test function
dump_vram(VRAM_DUMP_TYPE_PLT, 0, 0, 16);
*/
}
-static int first_time = TRUE;
#endif /* PPU_TEST */
int show_background(void) {