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2005-02-02 Geoffrey Keating <geoffk@apple.com>
authorgeoffk <geoffk@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 3 Feb 2005 06:36:02 +0000 (06:36 +0000)
committergeoffk <geoffk@138bc75d-0d04-0410-961f-82ee72b054a4>
Thu, 3 Feb 2005 06:36:02 +0000 (06:36 +0000)
* config/rs6000/altivec.md (altivec_dst): Make the first operand
a REG, not a MEM.
(altivec_dstt): Likewise.
(altivec_dstst): Likewise.
(altivec_dststt): Likewise.
* config/rs6000/rs6000.c (altivec_expand_dst_builtin): Adjust creation
of first operand.

Index: testsuite/ChangeLog
2005-02-02  Geoffrey Keating  <geoffk@apple.com>

* gcc.dg/altivec-19.c: New.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@94652 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/rs6000/altivec.md
gcc/config/rs6000/rs6000.c
gcc/testsuite/ChangeLog

index 3dd5b28..70370e2 100644 (file)
@@ -1,3 +1,13 @@
+2005-02-02  Geoffrey Keating  <geoffk@apple.com>
+
+       * config/rs6000/altivec.md (altivec_dst): Make the first operand
+       a REG, not a MEM.
+       (altivec_dstt): Likewise.
+       (altivec_dstst): Likewise.
+       (altivec_dststt): Likewise.
+       * config/rs6000/rs6000.c (altivec_expand_dst_builtin): Adjust creation
+       of first operand.
+
 2005-02-03  Dorit Naishlos  <dorit@il.ibm.com>
 
        * tree-vectorizer.c (slpeel_make_loop_iterate_ntimes): Copy
index 6084e16..1b3beff 100644 (file)
   [(set_attr "type" "vecsimple")])
 
 (define_insn "altivec_dst"
-  [(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
+  [(unspec [(match_operand 0 "register_operand" "b")
            (match_operand:SI 1 "register_operand" "r")
            (match_operand:QI 2 "immediate_operand" "i")] 190)]
-  "TARGET_ALTIVEC"
-  "dst %P0,%1,%2"
+  "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
+  "dst %0,%1,%2"
   [(set_attr "type" "vecsimple")])
 
 (define_insn "altivec_dstt"
-  [(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
+  [(unspec [(match_operand 0 "register_operand" "b")
            (match_operand:SI 1 "register_operand" "r")
            (match_operand:QI 2 "immediate_operand" "i")] 191)]
-  "TARGET_ALTIVEC"
-  "dstt %P0,%1,%2"
+  "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
+  "dstt %0,%1,%2"
   [(set_attr "type" "vecsimple")])
 
 (define_insn "altivec_dstst"
-  [(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
+  [(unspec [(match_operand 0 "register_operand" "b")
            (match_operand:SI 1 "register_operand" "r")
            (match_operand:QI 2 "immediate_operand" "i")] 192)]
-  "TARGET_ALTIVEC"
-  "dstst %P0,%1,%2"
+  "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
+  "dstst %0,%1,%2"
   [(set_attr "type" "vecsimple")])
 
 (define_insn "altivec_dststt"
-  [(unspec [(match_operand:V4SI 0 "memory_operand" "Q")
+  [(unspec [(match_operand 0 "register_operand" "b")
            (match_operand:SI 1 "register_operand" "r")
            (match_operand:QI 2 "immediate_operand" "i")] 193)]
-  "TARGET_ALTIVEC"
-  "dststt %P0,%1,%2"
+  "TARGET_ALTIVEC && GET_MODE (operands[0]) == Pmode"
+  "dststt %0,%1,%2"
   [(set_attr "type" "vecsimple")])
 
 (define_insn "altivec_lvsl"
index 4406f1b..f1bb23f 100644 (file)
@@ -7225,7 +7225,7 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED,
          }
 
        if (! (*insn_data[d->icode].operand[0].predicate) (op0, mode0))
-         op0 = gen_rtx_MEM (mode0, copy_to_mode_reg (Pmode, op0));
+         op0 = copy_to_mode_reg (Pmode, op0);
        if (! (*insn_data[d->icode].operand[1].predicate) (op1, mode1))
          op1 = copy_to_mode_reg (mode1, op1);
 
index 1d80350..b5f4ecc 100644 (file)
@@ -1,3 +1,7 @@
+2005-02-02  Geoffrey Keating  <geoffk@apple.com>
+
+       * gcc.dg/altivec-19.c: New.
+
 2005-02-03  Joseph S. Myers  <joseph@codesourcery.com>
 
        PR c/17807