* config/m32c/m32c.c (m32c_const_ok_for_constraint_p): Add ImB

constraint for single-bit-clear in lower byte of HI constant, vs
Imb which just ignores the upper byte.
* config/m32c/predicates.md (m32c_1mask8_operand): Use it.
* config/m32c/bitops.md (andhi3_16, andhi3_24): Use it.
(iorhi3_16): Check for single bit set, not single bit clear.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@141747 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 721cb77..c30ee95 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2008-11-10  DJ Delorie  <dj@redhat.com>
+
+       * config/m32c/m32c.c (m32c_const_ok_for_constraint_p): Add ImB
+       constraint for single-bit-clear in lower byte of HI constant, vs
+       Imb which just ignores the upper byte.
+       * config/m32c/predicates.md (m32c_1mask8_operand): Use it.
+       * config/m32c/bitops.md (andhi3_16, andhi3_24): Use it.
+       (iorhi3_16): Check for single bit set, not single bit clear.
+
 2008-11-10  Janis Johnson  <janis187@us.ibm.com>
 
        * doc/sourcebuild.texi (Torture Tests): Fix formatting for bullets.

diff --git a/gcc/config/m32c/bitops.md b/gcc/config/m32c/bitops.md
index 966e680..d92494a 100644 (file)
--- a/gcc/config/m32c/bitops.md
+++ b/gcc/config/m32c/bitops.md
@@ -98,7 +98,7 @@
 (define_insn "andhi3_16"
   [(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,??Rmm,RhiSd,??Rmm")
        (and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0")
-               (match_operand:HI 2 "mrai_operand" "Imb,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
+               (match_operand:HI 2 "mrai_operand" "ImB,Imw,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
   "TARGET_A16"
   "@
    
@@ -159,7 +159,7 @@
 (define_insn "iorhi3_16"
   [(set (match_operand:HI 0 "mra_operand" "=Sp,Sp,Rhi,RhiSd,RhiSd,??Rmm,??Rmm")
        (ior:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0")
-               (match_operand:HI 2 "mrai_operand" "Imb,Imw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))]
+               (match_operand:HI 2 "mrai_operand" "Ilb,Ilw,Ilw,iRhiSd,?Rmm,iRhiSd,?Rmm")))]
   "TARGET_A16"
   "@
    bset %B2,%0
@@ -192,7 +192,7 @@
 (define_insn "andhi3_24"
   [(set (match_operand:HI 0 "mra_operand" "=Sd,Sd,Rqi,Rqi,RhiSd,??Rmm,RhiSd,??Rmm")
        (and:HI (match_operand:HI 1 "mra_operand" "%0,0,0,0,0,0,0,0")
-               (match_operand:HI 2 "mrai_operand" "Imb,Imw,Imb,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
+               (match_operand:HI 2 "mrai_operand" "ImB,Imw,ImB,Imw,iRhiSd,?Rmm,?Rmm,iRhiSd")))]
   "TARGET_A24"
   "@
    bclr\t%B2,%0

diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 3fda87b..d2260c8 100644 (file)
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -949,6 +949,11 @@ m32c_const_ok_for_constraint_p (HOST_WIDE_INT value,
       int b = exact_log2 ((value ^ 0xff) & 0xff);
       return (b >= 0 && b <= 7);
     }
+  if (memcmp (str, "ImB", 3) == 0)
+    {
+      int b = exact_log2 ((value ^ 0xffff) & 0xffff);
+      return (b >= 0 && b <= 7);
+    }
   if (memcmp (str, "Ilw", 3) == 0)
     {
       int b = exact_log2 (value);

diff --git a/gcc/config/m32c/predicates.md b/gcc/config/m32c/predicates.md
index 5d1b842..1a2ff4b 100644 (file)
--- a/gcc/config/m32c/predicates.md
+++ b/gcc/config/m32c/predicates.md
@@ -284,7 +284,7 @@
 
 (define_predicate "m32c_1mask8_operand"
   (and (match_operand 0 "const_int_operand")
-       (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"Imb\")")))
+       (match_test "m32c_const_ok_for_constraint_p(INTVAL(op), 'I', \"ImB\")")))
 
 (define_predicate "m32c_1mask16_operand"
   (and (match_operand 0 "const_int_operand")