(set (reg:SI SP_REG) (plus:SI (reg:SI SP_REG) (const_int 4)))])]
"")
\f
-;; Convert compares with 1 to shorter inc/dec operations when CF is not
-;; required and register dies. Similarly for 128 to -128.
-(define_peephole2
- [(set (match_operand 0 "flags_reg_operand" "")
- (match_operator 1 "compare_operator"
- [(match_operand 2 "register_operand" "")
- (match_operand 3 "const_int_operand" "")]))]
- "(((!TARGET_FUSE_CMP_AND_BRANCH || optimize_insn_for_size_p ())
- && incdec_operand (operands[3], GET_MODE (operands[3])))
- || (!TARGET_FUSE_CMP_AND_BRANCH
- && INTVAL (operands[3]) == 128))
- && ix86_match_ccmode (insn, CCGCmode)
- && peep2_reg_dead_p (1, operands[2])"
- [(parallel [(set (match_dup 0)
- (match_op_dup 1 [(match_dup 2) (match_dup 3)]))
- (clobber (match_dup 2))])]
- "")
-\f
(define_peephole2
[(match_scratch:DI 0 "r")
(parallel [(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int -8)))
(set (reg:DI SP_REG) (plus:DI (reg:DI SP_REG) (const_int 8)))])]
"")
\f
+;; Convert compares with 1 to shorter inc/dec operations when CF is not
+;; required and register dies. Similarly for 128 to -128.
+(define_peephole2
+ [(set (match_operand 0 "flags_reg_operand" "")
+ (match_operator 1 "compare_operator"
+ [(match_operand 2 "register_operand" "")
+ (match_operand 3 "const_int_operand" "")]))]
+ "(((!TARGET_FUSE_CMP_AND_BRANCH || optimize_insn_for_size_p ())
+ && incdec_operand (operands[3], GET_MODE (operands[3])))
+ || (!TARGET_FUSE_CMP_AND_BRANCH
+ && INTVAL (operands[3]) == 128))
+ && ix86_match_ccmode (insn, CCGCmode)
+ && peep2_reg_dead_p (1, operands[2])"
+ [(parallel [(set (match_dup 0)
+ (match_op_dup 1 [(match_dup 2) (match_dup 3)]))
+ (clobber (match_dup 2))])])
+\f
;; Convert imul by three, five and nine into lea
(define_peephole2
[(parallel