* config/rs6000/rs6000.md: Document why a pattern is not

	available.

	* config/rs6000/rs6000.c (rs6000_emit_cmove): Disable comparisons
	of floats on the E500.
	(branch_positive_comparison_operator): Do not allow NE even on the
	E500.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@80617 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 1f41f58..94c8ab5 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,15 @@
 2004-04-11  Aldy Hernandez  <aldyh@redhat.com>
 
+       * config/rs6000/rs6000.md: Document why a pattern is not
+       available.
+
+       * config/rs6000/rs6000.c (rs6000_emit_cmove): Disable comparisons
+       of floats on the E500.
+       (branch_positive_comparison_operator): Do not allow NE even on the
+       E500.
+
+2004-04-11  Aldy Hernandez  <aldyh@redhat.com>
+
        * config/rs6000/rs6000.c (rs6000_assemble_integer): Change
        in_text_unlikely_section to in_unlikely_text_section.
 

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index ada5aab..b3a7364 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -8376,7 +8376,6 @@ branch_positive_comparison_operator (rtx op, enum machine_mode mode)
 
   code = GET_CODE (op);
   return (code == EQ || code == LT || code == GT
-         || (TARGET_E500 && TARGET_HARD_FLOAT && !TARGET_FPRS && code == NE)
          || code == LTU || code == GTU
          || code == UNORDERED);
 }
@@ -10195,6 +10194,9 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond)
        return rs6000_emit_int_cmove (dest, op, true_cond, false_cond);
       return 0;
     }
+  else if (TARGET_E500 && TARGET_HARD_FLOAT && !TARGET_FPRS
+          && GET_MODE_CLASS (compare_mode) == MODE_FLOAT)
+    return 0;
 
   /* Eliminate half of the comparisons by switching operands, this
      makes the remaining code simpler.  */

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 921ed63..4e96548 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -13666,6 +13666,8 @@
                                                      "cc_reg_operand" "0,y")
                                       (const_int 0)])
                      (const_int 0)))]
+  ;; This pattern is not available to SPE because the CR bits on an FP
+  ;; compare are different than traditional PPC.
   "!TARGET_SPE"
   "{crnor %E0,%j1,%j1|crnot %E0,%j1}"
   [(set_attr "type" "cr_logical,delayed_cr")])