* config/c6x/c6x.md (reserve_cycles): New attribute.

	* config/c6x/c6x.c (c6x_sched_reorder_1): Ensure insns we predicate
	don't reserve functional units after the branch occurs.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@184252 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index b3d1b9c..1bfeffc 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+2012-02-14  Bernd Schmidt  <bernds@codesourcery.com>
+
+       * config/c6x/c6x.md (reserve_cycles): New attribute.
+       * config/c6x/c6x.c (c6x_sched_reorder_1): Ensure insns we predicate
+       don't reserve functional units after the branch occurs.
+
 2012-02-14  Aldy Hernandez  <aldyh@redhat.com>
 
        PR middle-end/52142

diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c
index c128890..4cb4ffb 100644 (file)
--- a/gcc/config/c6x/c6x.c
+++ b/gcc/config/c6x/c6x.c
@@ -1,5 +1,5 @@
 /* Target Code for TI C6X
-   Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+   Copyright (C) 2010, 2011, 2012 Free Software Foundation, Inc.
    Contributed by Andrew Jenner <andrew@codesourcery.com>
    Contributed by Bernd Schmidt <bernds@codesourcery.com>
 
@@ -4196,13 +4196,14 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
          bool is_asm = (icode < 0
                         && (GET_CODE (PATTERN (insn)) == ASM_INPUT
                             || asm_noperands (PATTERN (insn)) >= 0));
-         int this_cycles;
+         int this_cycles, rsrv_cycles;
          enum attr_type type;
 
          gcc_assert (!is_asm);
          if (icode < 0)
            continue;
          this_cycles = get_attr_cycles (insn);
+         rsrv_cycles = get_attr_reserve_cycles (insn);
          type = get_attr_type (insn);
          /* Treat branches specially; there is also a hazard if two jumps
             end at the same cycle.  */
@@ -4211,6 +4212,7 @@ c6x_sched_reorder_1 (rtx *ready, int *pn_ready, int clock_var)
          if (clock_var + this_cycles <= first_cycle)
            continue;
          if ((first_jump > 0 && clock_var + this_cycles > second_cycle)
+             || clock_var + rsrv_cycles > first_cycle
              || !predicate_insn (insn, first_cond, false))
            {
              memmove (ready + 1, ready, (insnp - ready) * sizeof (rtx));

diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md
index ec3d04e..8e6ef4a 100644 (file)
--- a/gcc/config/c6x/c6x.md
+++ b/gcc/config/c6x/c6x.md
@@ -1,5 +1,5 @@
 ;; Machine description for TI C6X.
-;; Copyright (C) 2010, 2011 Free Software Foundation, Inc.
+;; Copyright (C) 2010, 2011, 2012 Free Software Foundation, Inc.
 ;; Contributed by Andrew Jenner <andrew@codesourcery.com>
 ;; Contributed by Bernd Schmidt <bernds@codesourcery.com>
 ;; Contributed by CodeSourcery.
@@ -201,6 +201,17 @@
         (eq_attr "type" "mpysp2dp") (const_int 5)]
        (const_int 1)))
 
+;; The number of cycles during which the instruction reserves functional
+;; units.
+(define_attr "reserve_cycles" ""
+  (cond [(eq_attr "type" "cmpdp") (const_int 2)
+        (eq_attr "type" "adddp") (const_int 2)
+        (eq_attr "type" "mpydp") (const_int 4)
+        (eq_attr "type" "mpyi") (const_int 4)
+        (eq_attr "type" "mpyid") (const_int 4)
+        (eq_attr "type" "mpyspdp") (const_int 2)]
+       (const_int 1)))
+
 (define_attr "predicable" "no,yes"
   (const_string "yes"))