* config/s390/s390.c (load_multiple_operation): Allow both SImode

	and DImode if word_mode is DImode.
	(store_multiple_operation): Likewise.
	* config/s390/s390.md ("load_multiple", "store_multiple"): Likewise.
	("*load_multiple_di"): Allow only if word_mode == DImode.
	("movqi"): Use LLGC whenever TARGET_ZARCH.
	("fix_truncdfsi2"): Fix incorrect temporary size.
	("fix_truncsfsi2"): Likewise.
	("*bras_r", "*brasl_r", "*basr_r"): Remove predicate and constraint
	string for function return value operand.
	("*bras_tls", "*brasl_tls", "*basr_tls"): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@72901 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 445a006..e790c93 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,17 @@
+2003-10-24  Ulrich Weigand  <uweigand@de.ibm.com>
+
+       * config/s390/s390.c (load_multiple_operation): Allow both SImode
+       and DImode if word_mode is DImode.
+       (store_multiple_operation): Likewise.
+       * config/s390/s390.md ("load_multiple", "store_multiple"): Likewise.
+       ("*load_multiple_di"): Allow only if word_mode == DImode.
+       ("movqi"): Use LLGC whenever TARGET_ZARCH.
+       ("fix_truncdfsi2"): Fix incorrect temporary size.
+       ("fix_truncsfsi2"): Likewise.
+       ("*bras_r", "*brasl_r", "*basr_r"): Remove predicate and constraint
+       string for function return value operand.
+       ("*bras_tls", "*brasl_tls", "*basr_tls"): Likewise.
+
 2003-10-24  Joseph S. Myers  <jsm@polyomino.org.uk>
 
        * c-parse.in (array_declarator): Use expr_no_commas.

diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c
index be564d6..63c2208 100644 (file)
--- a/gcc/config/s390/s390.c
+++ b/gcc/config/s390/s390.c
@@ -1555,6 +1555,7 @@ tls_symbolic_operand (register rtx op)
 int
 load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 {
+  enum machine_mode elt_mode;
   int count = XVECLEN (op, 0);
   unsigned int dest_regno;
   rtx src_addr;
@@ -1570,6 +1571,7 @@ load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 
   dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
   src_addr = XEXP (SET_SRC (XVECEXP (op, 0, 0)), 0);
+  elt_mode = GET_MODE (SET_DEST (XVECEXP (op, 0, 0)));
 
   /* Check, is base, or base + displacement.  */
 
@@ -1594,15 +1596,15 @@ load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 
       if (GET_CODE (elt) != SET
          || GET_CODE (SET_DEST (elt)) != REG
-         || GET_MODE (SET_DEST (elt)) != Pmode
+         || GET_MODE (SET_DEST (elt)) != elt_mode
          || REGNO (SET_DEST (elt)) != dest_regno + i
          || GET_CODE (SET_SRC (elt)) != MEM
-         || GET_MODE (SET_SRC (elt)) != Pmode
+         || GET_MODE (SET_SRC (elt)) != elt_mode
          || GET_CODE (XEXP (SET_SRC (elt), 0)) != PLUS
          || ! rtx_equal_p (XEXP (XEXP (SET_SRC (elt), 0), 0), src_addr)
          || GET_CODE (XEXP (XEXP (SET_SRC (elt), 0), 1)) != CONST_INT
          || INTVAL (XEXP (XEXP (SET_SRC (elt), 0), 1))
-            != off + i * UNITS_PER_WORD)
+            != off + i * GET_MODE_SIZE (elt_mode))
        return 0;
     }
 
@@ -1617,6 +1619,7 @@ load_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 int
 store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 {
+  enum machine_mode elt_mode;
   int count = XVECLEN (op, 0);
   unsigned int src_regno;
   rtx dest_addr;
@@ -1631,6 +1634,7 @@ store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 
   src_regno = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
   dest_addr = XEXP (SET_DEST (XVECEXP (op, 0, 0)), 0);
+  elt_mode = GET_MODE (SET_SRC (XVECEXP (op, 0, 0)));
 
   /* Check, is base, or base + displacement.  */
 
@@ -1655,15 +1659,15 @@ store_multiple_operation (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED)
 
       if (GET_CODE (elt) != SET
          || GET_CODE (SET_SRC (elt)) != REG
-         || GET_MODE (SET_SRC (elt)) != Pmode
+         || GET_MODE (SET_SRC (elt)) != elt_mode
          || REGNO (SET_SRC (elt)) != src_regno + i
          || GET_CODE (SET_DEST (elt)) != MEM
-         || GET_MODE (SET_DEST (elt)) != Pmode
+         || GET_MODE (SET_DEST (elt)) != elt_mode
          || GET_CODE (XEXP (SET_DEST (elt), 0)) != PLUS
          || ! rtx_equal_p (XEXP (XEXP (SET_DEST (elt), 0), 0), dest_addr)
          || GET_CODE (XEXP (XEXP (SET_DEST (elt), 0), 1)) != CONST_INT
          || INTVAL (XEXP (XEXP (SET_DEST (elt), 0), 1))
-            != off + i * UNITS_PER_WORD)
+            != off + i * GET_MODE_SIZE (elt_mode))
        return 0;
     }
   return 1;

diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md
index 1e1b08d..7cf926e 100644 (file)
--- a/gcc/config/s390/s390.md
+++ b/gcc/config/s390/s390.md
@@ -1356,14 +1356,14 @@
         (match_operand:QI 1 "general_operand" ""))]
   ""
 {
-  /* On 64-bit, zero-extending from memory to register
+  /* On z/Architecture, zero-extending from memory to register
      is just as fast as a QImode load.  */
-  if (TARGET_64BIT && optimize && !no_new_pseudos
+  if (TARGET_ZARCH && optimize && !no_new_pseudos
       && register_operand (operands[0], VOIDmode)
       && memory_operand (operands[1], VOIDmode))
     {
-      rtx tmp = gen_reg_rtx (DImode);
-      rtx ext = gen_rtx_ZERO_EXTEND (DImode, operands[1]);
+      rtx tmp = gen_reg_rtx (word_mode);
+      rtx ext = gen_rtx_ZERO_EXTEND (word_mode, operands[1]);
       emit_insn (gen_rtx_SET (VOIDmode, tmp, ext));
       operands[1] = gen_lowpart (QImode, tmp);
     }
@@ -1587,6 +1587,7 @@
                     (use (match_operand 2 "" ""))])]
   ""
 {
+  enum machine_mode mode;
   int regno;
   int count;
   rtx from;
@@ -1604,6 +1605,9 @@
 
   count = INTVAL (operands[2]);
   regno = REGNO (operands[0]);
+  mode = GET_MODE (operands[0]);
+  if (mode != SImode && mode != word_mode)
+    FAIL;
 
   operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
   if (no_new_pseudos)
@@ -1634,17 +1638,16 @@
 
   for (i = 0; i < count; i++)
     XVECEXP (operands[3], 0, i)
-      = gen_rtx_SET (VOIDmode, gen_rtx_REG (Pmode, regno + i),
-                    change_address (operands[1], Pmode,
-                                    plus_constant (from,
-                                                   off + i * UNITS_PER_WORD)));
+      = gen_rtx_SET (VOIDmode, gen_rtx_REG (mode, regno + i),
+                    change_address (operands[1], mode,
+                      plus_constant (from, off + i * GET_MODE_SIZE (mode))));
 })
 
 (define_insn "*load_multiple_di"
   [(match_parallel 0 "load_multiple_operation"
                   [(set (match_operand:DI 1 "register_operand" "=r")
                         (match_operand:DI 2 "s_operand" "QS"))])]
-  ""
+  "word_mode == DImode"
 {
   int words = XVECLEN (operands[0], 0);
   operands[0] = gen_rtx_REG (DImode, REGNO (operands[1]) + words - 1);
@@ -1676,6 +1679,7 @@
                     (use (match_operand 2 "" ""))])]
   ""
 {
+  enum machine_mode mode;
   int regno;
   int count;
   rtx to;
@@ -1693,6 +1697,9 @@
 
   count = INTVAL (operands[2]);
   regno = REGNO (operands[1]);
+  mode = GET_MODE (operands[1]);
+  if (mode != SImode && mode != word_mode)
+    FAIL;
 
   operands[3] = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (count));
 
@@ -1725,17 +1732,16 @@
   for (i = 0; i < count; i++)
     XVECEXP (operands[3], 0, i)
       = gen_rtx_SET (VOIDmode,
-                    change_address (operands[0], Pmode,
-                                    plus_constant (to,
-                                                   off + i * UNITS_PER_WORD)),
-                    gen_rtx_REG (Pmode, regno + i));
+                    change_address (operands[0], mode,
+                      plus_constant (to, off + i * GET_MODE_SIZE (mode))),
+                    gen_rtx_REG (mode, regno + i));
 })
 
 (define_insn "*store_multiple_di"
   [(match_parallel 0 "store_multiple_operation"
                   [(set (match_operand:DI 1 "s_operand" "=QS")
                         (match_operand:DI 2 "register_operand" "r"))])]
-  ""
+  "word_mode == DImode"
 {
   int words = XVECLEN (operands[0], 0);
   operands[0] = gen_rtx_REG (DImode, REGNO (operands[2]) + words - 1);
@@ -2781,7 +2787,7 @@
     {
       /* This is the algorithm from POP chapter A.5.7.2.  */
 
-      rtx temp   = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
+      rtx temp   = assign_stack_local (BLKmode, 8, BITS_PER_WORD);
       rtx two31r = s390_gen_rtx_const_DI (0x4f000000, 0x08000000);
       rtx two32  = s390_gen_rtx_const_DI (0x4e000001, 0x00000000);
 
@@ -2981,7 +2987,7 @@
     {
       /* This is the algorithm from POP chapter A.5.7.1.  */
 
-      rtx temp  = assign_stack_local (BLKmode, 2 * UNITS_PER_WORD, BITS_PER_WORD);
+      rtx temp  = assign_stack_local (BLKmode, 8, BITS_PER_WORD);
       rtx two31 = s390_gen_rtx_const_DI (0x4e000000, 0x80000000);
 
       emit_insn (gen_floatsidf2_ibm (operands[0], operands[1], two31, temp));
@@ -7036,7 +7042,7 @@
   "")
 
 (define_insn "*bras_r"
-  [(set (match_operand 0 "register_operand" "=df")
+  [(set (match_operand 0 "" "")
         (call (mem:QI (match_operand 1 "bras_sym_operand" "X"))
               (match_operand:SI 2 "const_int_operand" "n")))
    (clobber (match_operand 3 "register_operand" "=r"))]
@@ -7046,7 +7052,7 @@
    (set_attr "type"    "jsr")])
 
 (define_insn "*brasl_r"
-  [(set (match_operand 0 "register_operand" "=df")
+  [(set (match_operand 0 "" "")
         (call (mem:QI (match_operand 1 "bras_sym_operand" "X"))
               (match_operand 2 "const_int_operand" "n")))
    (clobber (match_operand 3 "register_operand" "=r"))]
@@ -7056,7 +7062,7 @@
    (set_attr "type"    "jsr")])
 
 (define_insn "*basr_r"
-  [(set (match_operand 0 "register_operand" "=df")
+  [(set (match_operand 0 "" "")
         (call (mem:QI (match_operand 1 "address_operand" "U"))
               (match_operand 2 "const_int_operand" "n")))
    (clobber (match_operand 3 "register_operand" "=r"))]
@@ -7190,7 +7196,7 @@
   "")
 
 (define_insn "*bras_tls"
-  [(set (match_operand 0 "register_operand" "=df")
+  [(set (match_operand 0 "" "")
         (call (mem:QI (match_operand 1 "bras_sym_operand" "X"))
               (match_operand 2 "const_int_operand" "n")))
    (clobber (match_operand 3 "register_operand" "=r"))
@@ -7201,7 +7207,7 @@
    (set_attr "type"    "jsr")])
 
 (define_insn "*brasl_tls"
-  [(set (match_operand 0 "register_operand" "=df")
+  [(set (match_operand 0 "" "")
         (call (mem:QI (match_operand 1 "bras_sym_operand" "X"))
               (match_operand 2 "const_int_operand" "n")))
    (clobber (match_operand 3 "register_operand" "=r"))
@@ -7212,7 +7218,7 @@
    (set_attr "type"    "jsr")])
 
 (define_insn "*basr_tls"
-  [(set (match_operand 0 "register_operand" "=df")
+  [(set (match_operand 0 "" "")
         (call (mem:QI (match_operand 1 "address_operand" "U"))
               (match_operand 2 "const_int_operand" "n")))
    (clobber (match_operand 3 "register_operand" "=r"))