* config/vax/vax.c (nonindexed_address_p): Change logical negation

	from '! xxx' to '!xxx' for coding-style conformance.
	* config/vax/vax.h (PCC_BITFIELD_TYPE_MATTERS): Likewise.
	(EXTRA_CONSTRAINT): Likewise.
	* config/vax/vax.md (four unnamed insns): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@112113 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e0ffaa3..568767f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2006-03-15  Jan-Benedict Glaw  <jbglaw@lug-owl.de>
+
+       * config/vax/vax.c (nonindexed_address_p): Change logical negation
+       from '! xxx' to '!xxx' for coding-style conformance.
+       * config/vax/vax.h (PCC_BITFIELD_TYPE_MATTERS): Likewise.
+       (EXTRA_CONSTRAINT): Likewise.
+       * config/vax/vax.md (four unnamed insns): Likewise.
+       
 2006-03-15  Paul Brook  <paul@codesourcery.com>
 
        * config/arm/arm.c (minipool_pad): New.

diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index 8a34258..cff421f 100644 (file)
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -1182,7 +1182,7 @@ nonindexed_address_p (rtx x, int strict)
   if (REG_P (x))
     {
       extern rtx *reg_equiv_mem;
-      if (! reload_in_progress
+      if (!reload_in_progress
          || reg_equiv_mem[REGNO (x)] == 0
          || indirectable_address_p (reg_equiv_mem[REGNO (x)], strict))
        return 1;

diff --git a/gcc/config/vax/vax.h b/gcc/config/vax/vax.h
index dae115a..68f88c1 100644 (file)
--- a/gcc/config/vax/vax.h
+++ b/gcc/config/vax/vax.h
@@ -104,7 +104,7 @@ Boston, MA 02110-1301, USA.  */
 #define STRUCTURE_SIZE_BOUNDARY 8
 
 /* A bit-field declared as `int' forces `int' alignment for the struct.  */
-#define PCC_BITFIELD_TYPE_MATTERS (! TARGET_VAXC_ALIGNMENT)
+#define PCC_BITFIELD_TYPE_MATTERS (!TARGET_VAXC_ALIGNMENT)
 
 /* No data type wants to be aligned rounder than this.  */
 #define BIGGEST_ALIGNMENT 32
@@ -289,9 +289,9 @@ enum reg_class { NO_REGS, ALL_REGS, LIM_REG_CLASSES };
    For the VAX, `Q' means that OP is a MEM that does not have a mode-dependent
    address.  */
 
-#define EXTRA_CONSTRAINT(OP, C)                                                \
-  ((C) == 'Q'                                                          \
-   ? MEM_P (OP) && ! mode_dependent_address_p (XEXP (OP, 0))   \
+#define EXTRA_CONSTRAINT(OP, C)                                        \
+  ((C) == 'Q'                                                  \
+   ? MEM_P (OP) && !mode_dependent_address_p (XEXP (OP, 0))    \
    : 0)
 
 /* Given an rtx X being reloaded into a reg required to be

diff --git a/gcc/config/vax/vax.md b/gcc/config/vax/vax.md
index 2e1a379..04a813f 100644 (file)
--- a/gcc/config/vax/vax.md
+++ b/gcc/config/vax/vax.md
@@ -762,7 +762,7 @@
    "(INTVAL (operands[1]) == 8 || INTVAL (operands[1]) == 16)
    && INTVAL (operands[2]) % INTVAL (operands[1]) == 0
    && (REG_P (operands[0])
-       || ! mode_dependent_address_p (XEXP (operands[0], 0)))"
+       || !mode_dependent_address_p (XEXP (operands[0], 0)))"
   "*
 {
   if (REG_P (operands[0]))
@@ -790,7 +790,7 @@
   "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
    && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
    && (REG_P (operands[1])
-       || ! mode_dependent_address_p (XEXP (operands[1], 0)))"
+       || !mode_dependent_address_p (XEXP (operands[1], 0)))"
   "*
 {
   if (REG_P (operands[1]))
@@ -817,7 +817,7 @@
   "(INTVAL (operands[2]) == 8 || INTVAL (operands[2]) == 16)
    && INTVAL (operands[3]) % INTVAL (operands[2]) == 0
    && (REG_P (operands[1])
-       || ! mode_dependent_address_p (XEXP (operands[1], 0)))"
+       || !mode_dependent_address_p (XEXP (operands[1], 0)))"
   "*
 {
   if (REG_P (operands[1]))
@@ -963,7 +963,7 @@
   ""
   "*
 {
-  if (! REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
+  if (!REG_P (operands[0]) || GET_CODE (operands[2]) != CONST_INT
       || GET_CODE (operands[3]) != CONST_INT
       || INTVAL (operands[2]) + INTVAL (operands[3]) > 32
       || side_effects_p (operands[1])