(define_insn "arm_sync_compare_and_swapsi"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI
- [(match_operand:SI 1 "memory_operand" "+m")
+ [(match_operand:SI 1 "arm_sync_memory_operand" "+Q")
(match_operand:SI 2 "s_register_operand" "r")
(match_operand:SI 3 "s_register_operand" "r")]
VUNSPEC_SYNC_COMPARE_AND_SWAP))
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(zero_extend:SI
(unspec_volatile:NARROW
- [(match_operand:NARROW 1 "memory_operand" "+m")
+ [(match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")
(match_operand:SI 2 "s_register_operand" "r")
(match_operand:SI 3 "s_register_operand" "r")]
VUNSPEC_SYNC_COMPARE_AND_SWAP)))
(define_insn "arm_sync_lock_test_and_setsi"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
- (match_operand:SI 1 "memory_operand" "+m"))
+ (match_operand:SI 1 "arm_sync_memory_operand" "+Q"))
(set (match_dup 1)
(unspec_volatile:SI [(match_operand:SI 2 "s_register_operand" "r")]
VUNSPEC_SYNC_LOCK))
(define_insn "arm_sync_lock_test_and_set<mode>"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
- (zero_extend:SI (match_operand:NARROW 1 "memory_operand" "+m")))
+ (zero_extend:SI (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q")))
(set (match_dup 1)
(unspec_volatile:NARROW [(match_operand:SI 2 "s_register_operand" "r")]
VUNSPEC_SYNC_LOCK))
(define_insn "arm_sync_new_<sync_optab>si"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(syncop:SI
- (match_operand:SI 1 "memory_operand" "+m")
+ (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
(match_operand:SI 2 "s_register_operand" "r"))
]
VUNSPEC_SYNC_NEW_OP))
(define_insn "arm_sync_new_nandsi"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(not:SI (and:SI
- (match_operand:SI 1 "memory_operand" "+m")
+ (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
(match_operand:SI 2 "s_register_operand" "r")))
]
VUNSPEC_SYNC_NEW_OP))
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(syncop:SI
(zero_extend:SI
- (match_operand:NARROW 1 "memory_operand" "+m"))
+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
(match_operand:SI 2 "s_register_operand" "r"))
]
VUNSPEC_SYNC_NEW_OP))
[(not:SI
(and:SI
(zero_extend:SI
- (match_operand:NARROW 1 "memory_operand" "+m"))
+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
(match_operand:SI 2 "s_register_operand" "r")))
] VUNSPEC_SYNC_NEW_OP))
(set (match_dup 1)
(define_insn "arm_sync_old_<sync_optab>si"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(syncop:SI
- (match_operand:SI 1 "memory_operand" "+m")
+ (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
(match_operand:SI 2 "s_register_operand" "r"))
]
VUNSPEC_SYNC_OLD_OP))
(define_insn "arm_sync_old_nandsi"
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(not:SI (and:SI
- (match_operand:SI 1 "memory_operand" "+m")
+ (match_operand:SI 1 "arm_sync_memory_operand" "+Q")
(match_operand:SI 2 "s_register_operand" "r")))
]
VUNSPEC_SYNC_OLD_OP))
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(syncop:SI
(zero_extend:SI
- (match_operand:NARROW 1 "memory_operand" "+m"))
+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
(match_operand:SI 2 "s_register_operand" "r"))
]
VUNSPEC_SYNC_OLD_OP))
[(set (match_operand:SI 0 "s_register_operand" "=&r")
(unspec_volatile:SI [(not:SI (and:SI
(zero_extend:SI
- (match_operand:NARROW 1 "memory_operand" "+m"))
+ (match_operand:NARROW 1 "arm_sync_memory_operand" "+Q"))
(match_operand:SI 2 "s_register_operand" "r")))
]
VUNSPEC_SYNC_OLD_OP))