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2001-09-04 David S. Miller <davem@redhat.com>
authordavem <davem@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 4 Sep 2001 10:10:17 +0000 (10:10 +0000)
committerdavem <davem@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 4 Sep 2001 10:10:17 +0000 (10:10 +0000)
* config/sparc/sparc.md (define_splits): Kill constraints.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@45370 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/sparc/sparc.md

index a7ce66e..ff83661 100644 (file)
@@ -1,3 +1,7 @@
+2001-09-04  David S. Miller  <davem@redhat.com>
+
+       * config/sparc/sparc.md (define_splits): Kill constraints.
+
 2001-09-03  Jakub Jelinek  <jakub@redhat.com>
 
        * loop.c (express_from_1): Fix CONSTANT_P(a) case.
index ee40b6b..8403cf5 100644 (file)
    (set_attr "length" "1")])
 
 (define_split
-  [(set (match_operand:SI 0 "register_operand" "=r")
+  [(set (match_operand:SI 0 "register_operand" "")
        (match_operator:SI 2 "noov_compare_op"
                           [(match_operand 1 "icc_or_fcc_reg_operand" "")
                            (const_int 0)]))]
    (set_attr "length" "2")])
 
 (define_split
-  [(set (match_operand:TF 0 "register_operand" "=e,e")
+  [(set (match_operand:TF 0 "register_operand" "")
        (if_then_else:TF (match_operator 1 "comparison_operator"
-                               [(match_operand 2 "icc_or_fcc_reg_operand" "X,X")
+                               [(match_operand 2 "icc_or_fcc_reg_operand" "")
                                 (const_int 0)])
-                         (match_operand:TF 3 "register_operand" "e,0")
-                         (match_operand:TF 4 "register_operand" "0,e")))]
+                         (match_operand:TF 3 "register_operand" "")
+                         (match_operand:TF 4 "register_operand" "")))]
   "reload_completed && TARGET_V9 && TARGET_FPU && !TARGET_HARD_QUAD"
   [(clobber (const_int 0))]
   "
    (set_attr "length" "2")])
 
 (define_split
-  [(set (match_operand:TF 0 "register_operand" "=e,e")
+  [(set (match_operand:TF 0 "register_operand" "")
        (if_then_else:TF (match_operator 1 "v9_regcmp_op"
-                               [(match_operand:DI 2 "register_operand" "r,r")
+                               [(match_operand:DI 2 "register_operand" "")
                                 (const_int 0)])
-                         (match_operand:TF 3 "register_operand" "e,0")
-                         (match_operand:TF 4 "register_operand" "0,e")))]
+                         (match_operand:TF 3 "register_operand" "")
+                         (match_operand:TF 4 "register_operand" "")))]
   "reload_completed && TARGET_ARCH64 && TARGET_FPU && ! TARGET_HARD_QUAD"
   [(clobber (const_int 0))]
   "
   [(set_attr "length" "2")])
 
 (define_split
-  [(set (match_operand:DI 0 "register_operand" "=r")
-       (plus:DI (match_operand:DI 1 "arith_double_operand" "%r")
-                (match_operand:DI 2 "arith_double_operand" "rHI")))
+  [(set (match_operand:DI 0 "register_operand" "")
+       (plus:DI (match_operand:DI 1 "arith_double_operand" "")
+                (match_operand:DI 2 "arith_double_operand" "")))
    (clobber (reg:CC 100))]
   "! TARGET_ARCH64 && reload_completed"
   [(parallel [(set (reg:CC_NOOV 100)
 }")
 
 (define_split
-  [(set (match_operand:DI 0 "register_operand" "=r")
-       (minus:DI (match_operand:DI 1 "arith_double_operand" "r")
-                 (match_operand:DI 2 "arith_double_operand" "rHI")))
+  [(set (match_operand:DI 0 "register_operand" "")
+       (minus:DI (match_operand:DI 1 "arith_double_operand" "")
+                 (match_operand:DI 2 "arith_double_operand" "")))
    (clobber (reg:CC 100))]
   "! TARGET_ARCH64 && reload_completed"
   [(parallel [(set (reg:CC_NOOV 100)
    (set_attr "length" "2")])
 
 (define_split
-  [(set (match_operand:DI 0 "register_operand" "=r")
-       (zero_extend:DI (minus:SI (minus:SI (match_operand:SI 1 "reg_or_0_operand" "rJ")
-                                            (match_operand:SI 2 "arith_operand" "rI"))
+  [(set (match_operand:DI 0 "register_operand" "")
+       (zero_extend:DI (minus:SI (minus:SI (match_operand:SI 1 "reg_or_0_operand" "")
+                                            (match_operand:SI 2 "arith_operand" ""))
                                   (ltu:SI (reg:CC_NOOV 100) (const_int 0)))))]
   "! TARGET_ARCH64 && reload_completed"
   [(set (match_dup 3) (minus:SI (minus:SI (match_dup 1) (match_dup 2))
    (set_attr "length" "1,2")])
 
 (define_split
-  [(set (match_operand:TF 0 "register_operand" "=e,e")
-       (abs:TF (match_operand:TF 1 "register_operand" "0,e")))]
+  [(set (match_operand:TF 0 "register_operand" "")
+       (abs:TF (match_operand:TF 1 "register_operand" "")))]
   "TARGET_FPU
    && ! TARGET_V9
    && reload_completed
    (set_attr "length" "1,2")])
 
 (define_split
-  [(set (match_operand:TF 0 "register_operand" "=e,e")
-       (abs:TF (match_operand:TF 1 "register_operand" "0,e")))]
+  [(set (match_operand:TF 0 "register_operand" "")
+       (abs:TF (match_operand:TF 1 "register_operand" "")))]
   "TARGET_FPU
    && TARGET_V9
    && reload_completed
    (set_attr "length" "1,2")])
 
 (define_split
-  [(set (match_operand:DF 0 "register_operand" "=e,e")
-       (abs:DF (match_operand:DF 1 "register_operand" "0,e")))]
+  [(set (match_operand:DF 0 "register_operand" "")
+       (abs:DF (match_operand:DF 1 "register_operand" "")))]
   "TARGET_FPU
    && ! TARGET_V9
    && reload_completed