Revert

	2007-08-29  Jie Zhang  <jie.zhang@analog.com>
	* config/bfin/bfin.md (composev2hi): Put operands into vector
	with correct order.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@127890 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index ceae94e..4ffc94a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2007-08-29  Jie Zhang  <jie.zhang@analog.com>
 
+       Revert
+       2007-08-29  Jie Zhang  <jie.zhang@analog.com>
+       * config/bfin/bfin.md (composev2hi): Put operands into vector
+       with correct order.
+
+2007-08-29  Jie Zhang  <jie.zhang@analog.com>
+
        * config/bfin/bfin.md (composev2hi): Put operands into vector
        with correct order.
 

diff --git a/gcc/config/bfin/bfin.md b/gcc/config/bfin/bfin.md
index 7c919b7..e465cd5 100644 (file)
--- a/gcc/config/bfin/bfin.md
+++ b/gcc/config/bfin/bfin.md
@@ -2831,16 +2831,16 @@
                         (match_operand:HI 1 "register_operand" "d,d")))]
   ""
   "@
-   %d0 = %h1 << 0%!
+   %d0 = %h2 << 0%!
    #"
   "reload_completed"
   [(set (match_dup 0)
        (vec_concat:V2HI
         (vec_select:HI (match_dup 0) (parallel [(const_int 0)]))
-        (match_dup 1)))
+        (match_dup 2)))
    (set (match_dup 0)
        (vec_concat:V2HI
-        (match_dup 2)
+        (match_dup 1)
         (vec_select:HI (match_dup 0) (parallel [(const_int 1)]))))]
   ""
   [(set_attr "type" "dsp32")])