Warning patch:

	* mips.c (function_arg_pass_by_reference): Don't do automatic
	aggregate initialization.
	(machine_dependent_reorg): Initialize variable `mode'.

	* mips.md (absdi2): Change variable `regno1' to unsigned int.
	(reload_indi): Rename loword/hiword to lo_word/hi_word to avoid
	conflicts with sys/param.h macro of the same name.
	(reload_outdi): Likewise.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@35047 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 45b1d54..66391fd 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,14 @@
+2000-07-15  Kaveh R. Ghazi  <ghazi@caip.rutgers.edu>
+
+       * mips.c (function_arg_pass_by_reference): Don't do automatic
+       aggregate initialization.
+       (machine_dependent_reorg): Initialize variable `mode'.
+       
+       * mips.md (absdi2): Change variable `regno1' to unsigned int.
+       (reload_indi): Rename loword/hiword to lo_word/hi_word to avoid
+       conflicts with sys/param.h macro of the same name.
+       (reload_outdi): Likewise.
+
 2000-07-15  Michael Meissner  <meissner@redhat.com>
 
        * fold-const.c (fold): When optimizing FOO++ == CONST into ++FOO

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 4535b9c..8d9c55e 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -7784,7 +7784,8 @@ function_arg_pass_by_reference (cum, mode, type, named)
         /* Don't pass the actual CUM to FUNCTION_ARG, because we would 
            get double copies of any offsets generated for small structs 
            passed in registers. */
-        CUMULATIVE_ARGS temp = *cum;
+        CUMULATIVE_ARGS temp;
+        temp = *cum;
         if (FUNCTION_ARG (temp, mode, type, named) != 0)
            return 1;
      }
@@ -9097,7 +9098,7 @@ machine_dependent_reorg (first)
          && GET_CODE (PATTERN (insn)) == SET)
        {
          rtx val, src;
-         enum machine_mode mode;
+         enum machine_mode mode = VOIDmode;
 
          val = NULL_RTX;
          src = mips_find_symbol (SET_SRC (PATTERN (insn)));

diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md
index 8a84f33..92f5bea 100644 (file)
--- a/gcc/config/mips/mips.md
+++ b/gcc/config/mips/mips.md
@@ -2838,7 +2838,7 @@
   "TARGET_64BIT && !TARGET_MIPS16"
   "*
 {
-  int regno1;
+  unsigned int regno1;
   dslots_jump_total++;
   dslots_jump_filled++;
   operands[2] = const0_rtx;
@@ -4988,7 +4988,7 @@ move\\t%0,%z4\\n\\
     {
       if (GET_CODE (operands[1]) == MEM)
        {
-         rtx memword, offword, hiword, loword;
+         rtx memword, offword, hi_word, lo_word;
          rtx addr = find_replacement (&XEXP (operands[1], 0));
          rtx op1 = change_address (operands[1], VOIDmode, addr);
 
@@ -4998,17 +4998,17 @@ move\\t%0,%z4\\n\\
                                    SImode, NULL_RTX);
          if (BYTES_BIG_ENDIAN)
            {
-             hiword = memword;
-             loword = offword;
+             hi_word = memword;
+             lo_word = offword;
            }
          else
            {
-             hiword = offword;
-             loword = memword;
+             hi_word = offword;
+             lo_word = memword;
            }
-         emit_move_insn (scratch, hiword);
+         emit_move_insn (scratch, hi_word);
          emit_move_insn (gen_rtx_REG (SImode, 64), scratch);
-         emit_move_insn (scratch, loword);
+         emit_move_insn (scratch, lo_word);
          emit_move_insn (gen_rtx (REG, SImode, 65), scratch);
           emit_insn (gen_rtx_USE (VOIDmode, operands[0]));
        }
@@ -5068,7 +5068,7 @@ move\\t%0,%z4\\n\\
     {
       if (GET_CODE (operands[0]) == MEM)
        {
-         rtx scratch, memword, offword, hiword, loword;
+         rtx scratch, memword, offword, hi_word, lo_word;
          rtx addr = find_replacement (&XEXP (operands[0], 0));
          rtx op0 = change_address (operands[0], VOIDmode, addr);
 
@@ -5078,18 +5078,18 @@ move\\t%0,%z4\\n\\
                                    SImode, NULL_RTX);
          if (BYTES_BIG_ENDIAN)
            {
-             hiword = memword;
-             loword = offword;
+             hi_word = memword;
+             lo_word = offword;
            }
          else
            {
-             hiword = offword;
-             loword = memword;
+             hi_word = offword;
+             lo_word = memword;
            }
          emit_move_insn (scratch, gen_rtx_REG (SImode, 64));
-         emit_move_insn (hiword, scratch);
+         emit_move_insn (hi_word, scratch);
          emit_move_insn (scratch, gen_rtx_REG (SImode, 65));
-         emit_move_insn (loword, scratch);
+         emit_move_insn (lo_word, scratch);
          emit_insn (gen_rtx_USE (VOIDmode, operands[1]));
        }
       else if (TARGET_MIPS16 && ! M16_REG_P (REGNO (operands[0])))