* pa/pa.c (emit_move_sequence): Don't lose for a secondary reload

        to the SAR register if the input is a MEM with an offset that won't
        fit in 14bits.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@13753 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c
index 221166f..5f94160 100644 (file)
--- a/gcc/config/pa/pa.c
+++ b/gcc/config/pa/pa.c
@@ -1170,7 +1170,21 @@ emit_move_sequence (operands, mode, scratch_reg)
                   && FP_REG_CLASS_P (REGNO_REG_CLASS (REGNO (operand1)))))
           && scratch_reg)
     {
-      emit_move_insn (scratch_reg, operand1);
+      /* D might not fit in 14 bits either; for such cases load D into
+        scratch reg.  */
+      if (GET_CODE (operand1) == MEM
+         && !memory_address_p (SImode, XEXP (operand1, 0)))
+       {
+         emit_move_insn (scratch_reg, XEXP (XEXP (operand1, 0), 1));   
+         emit_move_insn (scratch_reg, gen_rtx (GET_CODE (XEXP (operand1, 0)),
+                                               SImode,
+                                               XEXP (XEXP (operand1, 0), 0),
+                                               scratch_reg));
+         emit_move_insn (scratch_reg, gen_rtx (MEM, GET_MODE (operand1),
+                                               scratch_reg));
+       }
+      else
+       emit_move_insn (scratch_reg, operand1);
       emit_move_insn (operand0, scratch_reg);
       return 1;
     }