PR target/32413

    * config/i386/i386.c (ix86_register_move_cost): Rise the cost of
    moves between MMX/SSE registers to at least 8 units to prevent
    ICE caused by non-tieable SI/HI/QImodes in SSE registers.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@125951 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e97babf..349272b 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
 2007-06-22  Uros Bizjak  <ubizjak@gmail.com>
 
+       PR target/32413
+       * config/i386/i386.c (ix86_register_move_cost): Rise the cost of
+       moves between MMX/SSE registers to at least 8 units to prevent
+       ICE caused by non-tieable SI/HI/QImodes in SSE registers. 
+
+2007-06-22  Uros Bizjak  <ubizjak@gmail.com>
+
        * config/i386/i386.c (override_options): Correct x86_sahf
        setting condition.
 

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 1483cac..5c5cb52 100644 (file)
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -20279,7 +20279,15 @@ ix86_register_move_cost (enum machine_mode mode, enum reg_class class1,
   /* Moves between SSE/MMX and integer unit are expensive.  */
   if (MMX_CLASS_P (class1) != MMX_CLASS_P (class2)
       || SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
-    return ix86_cost->mmxsse_to_integer;
+
+    /* ??? By keeping returned value relatively high, we limit the number
+       of moves between integer and MMX/SSE registers for all targets.
+       Additionally, high value prevents problem with x86_modes_tieable_p(),
+       where integer modes in MMX/SSE registers are not tieable
+       because of missing QImode and HImode moves to, from or between
+       MMX/SSE registers.  */
+    return MAX (ix86_cost->mmxsse_to_integer, 8);
+
   if (MAYBE_FLOAT_CLASS_P (class1))
     return ix86_cost->fp_move;
   if (MAYBE_SSE_CLASS_P (class1))