+2002-01-08 Dale Johannesen <dalej@apple.com>
+
+ * config/rs6000/rs6000.md: Add missing int register
+ target case to movdf_low.
+
2002-01-08 Zack Weinberg <zack@codesourcery.com>
* Makefile.in (cs-tconfig.h): Don't depend on $(CONFIG_H) or
(set_attr "length" "4")])
(define_insn "movdf_low"
- [(set (match_operand:DF 0 "gpc_reg_operand" "=f")
- (mem:DF (lo_sum:SI (match_operand:SI 1 "register_operand" "b")
+ [(set (match_operand:DF 0 "gpc_reg_operand" "=f,!r")
+ (mem:DF (lo_sum:SI (match_operand:SI 1 "register_operand" "b,b")
(match_operand 2 "" ""))))]
"TARGET_MACHO && TARGET_HARD_FLOAT && ! TARGET_64BIT"
- "lfd %0,lo16(%2)(%1)"
+ "*
+{
+ switch (which_alternative)
+ {
+ case 0:
+ return \"lfd %0,lo16(%2)(%1)\";
+ case 1:
+ {
+ rtx operands2[4];
+ operands2[0] = operands[0];
+ operands2[1] = operands[1];
+ operands2[2] = operands[2];
+ operands2[3] = gen_rtx_REG (SImode, PIC_OFFSET_TABLE_REGNUM);
+ output_asm_insn (\"{l|lwz} %0,lo16(%2)(%1)\", operands);
+ /* We cannot rely on ha16(low half)==ha16(high half), alas,
+ although in practice it almost always is. */
+ output_asm_insn (\"{cau|addis} %L0,%3,ha16(%2+4)\", operands2);
+ return (\"{l|lwz} %L0,lo16(%2+4)(%L0)\");
+ }
+ default:
+ abort();
+ }
+}"
[(set_attr "type" "load")
- (set_attr "length" "4")])
+ (set_attr "length" "4,12")])
(define_insn "movdf_low_st"
[(set (mem:DF (lo_sum:SI (match_operand:SI 1 "register_operand" "b")