2007-05-25 H.J. Lu <hongjiu.lu@intel.com>
+ * config/i386/i386.c (__builtin_ia32_vec_ext_v2df): Mark it
+ with MASK_SSE2.
+ (__builtin_ia32_vec_ext_v2di): Likewise.
+ (__builtin_ia32_vec_ext_v4si): Likewise.
+ (__builtin_ia32_vec_ext_v8hi): Likewise.
+ (__builtin_ia32_vec_ext_v16qi): Likewise.
+ (__builtin_ia32_vec_set_v8hi): Likewise.
+
+2007-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
* config/i386/sse.md (*vec_extractv2di_1_sse2): Correct shift.
2007-05-25 Richard Sandiford <richard@codesourcery.com>
/* Access to the vec_extract patterns. */
ftype = build_function_type_list (double_type_node, V2DF_type_node,
integer_type_node, NULL_TREE);
- def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v2df",
+ def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v2df",
ftype, IX86_BUILTIN_VEC_EXT_V2DF);
ftype = build_function_type_list (long_long_integer_type_node,
V2DI_type_node, integer_type_node,
NULL_TREE);
- def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v2di",
+ def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v2di",
ftype, IX86_BUILTIN_VEC_EXT_V2DI);
ftype = build_function_type_list (float_type_node, V4SF_type_node,
ftype = build_function_type_list (intSI_type_node, V4SI_type_node,
integer_type_node, NULL_TREE);
- def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v4si",
+ def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v4si",
ftype, IX86_BUILTIN_VEC_EXT_V4SI);
ftype = build_function_type_list (intHI_type_node, V8HI_type_node,
integer_type_node, NULL_TREE);
- def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v8hi",
+ def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v8hi",
ftype, IX86_BUILTIN_VEC_EXT_V8HI);
ftype = build_function_type_list (intHI_type_node, V4HI_type_node,
ftype = build_function_type_list (intQI_type_node, V16QI_type_node,
integer_type_node, NULL_TREE);
- def_builtin (MASK_SSE, "__builtin_ia32_vec_ext_v16qi",
+ def_builtin (MASK_SSE2, "__builtin_ia32_vec_ext_v16qi",
ftype, IX86_BUILTIN_VEC_EXT_V16QI);
/* Access to the vec_set patterns. */
ftype = build_function_type_list (V8HI_type_node, V8HI_type_node,
intHI_type_node,
integer_type_node, NULL_TREE);
- def_builtin (MASK_SSE, "__builtin_ia32_vec_set_v8hi",
+ def_builtin (MASK_SSE2, "__builtin_ia32_vec_set_v8hi",
ftype, IX86_BUILTIN_VEC_SET_V8HI);
ftype = build_function_type_list (V4HI_type_node, V4HI_type_node,
+2007-05-25 H.J. Lu <hongjiu.lu@intel.com>
+
+ * gcc.target/i386/sse2-check.h: New.
+ * gcc.target/i386/sse2-vec-1.c: Likewise.
+ * gcc.target/i386/sse2-vec-2.c: Likewise.
+ * gcc.target/i386/sse2-vec-3.c: Likewise.
+ * gcc.target/i386/sse2-vec-4.c: Likewise.
+ * gcc.target/i386/sse2-vec-5.c: Likewise.
+ * gcc.target/i386/sse2-vec-6.c: Likewise.
+
2007-05-25 Douglas Gregor <doug.gregor@gmail.com>
PR c++/31431
--- /dev/null
+#include <stdio.h>
+#include <stdlib.h>
+
+#include "../../gcc.dg/i386-cpuid.h"
+
+static void sse2_test (void);
+
+int
+main ()
+{
+ unsigned long cpu_facilities;
+
+ cpu_facilities = i386_cpuid_edx ();
+
+ /* Run SSE2 test only if host has SSE2 support. */
+ if ((cpu_facilities & bit_SSE2))
+ sse2_test ();
+
+ exit (0);
+}
--- /dev/null
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+#include "sse2-check.h"
+
+#include <emmintrin.h>
+
+#define msk0 0
+#define msk1 1
+
+static void
+sse2_test (void)
+{
+ union
+ {
+ __m128d x;
+ double d[2];
+ } val1;
+ double res[2];
+ int masks[2];
+ int i;
+
+ val1.d[0] = 23.;
+ val1.d[1] = 45;
+
+ res[0] = __builtin_ia32_vec_ext_v2df ((__v2df)val1.x, msk0);
+ res[1] = __builtin_ia32_vec_ext_v2df ((__v2df)val1.x, msk1);
+
+ masks[0] = msk0;
+ masks[1] = msk1;
+
+ for (i = 0; i < 2; i++)
+ if (res[i] != val1.d [masks[i]])
+ abort ();
+}
--- /dev/null
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+#include "sse2-check.h"
+
+#include <emmintrin.h>
+
+static void
+sse2_test (void)
+{
+ union
+ {
+ __m128i x;
+ char c[16];
+ short s[8];
+ int i[4];
+ long long ll[2];
+ } val1;
+ long long res[2];
+ int masks[2];
+ int i;
+
+ for (i = 0; i < 16; i++)
+ val1.c[i] = i;
+
+ res[0] = __builtin_ia32_vec_ext_v2di ((__v2di)val1.x, 0);
+ res[1] = __builtin_ia32_vec_ext_v2di ((__v2di)val1.x, 1);
+
+ for (i = 0; i < 2; i++)
+ masks[i] = i;
+
+ for (i = 0; i < 2; i++)
+ if (res[i] != val1.ll [masks[i]])
+ abort ();
+}
--- /dev/null
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+#include "sse2-check.h"
+
+#include <emmintrin.h>
+
+static void
+sse2_test (void)
+{
+ union
+ {
+ __m128i x;
+ char c[16];
+ short s[8];
+ int i[4];
+ long long ll[2];
+ } val1;
+ int res[4];
+ int masks[4];
+ int i;
+
+ for (i = 0; i < 16; i++)
+ val1.c[i] = i;
+
+ res[0] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 0);
+ res[1] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 1);
+ res[2] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 2);
+ res[3] = __builtin_ia32_vec_ext_v4si ((__v4si)val1.x, 3);
+
+ for (i = 0; i < 4; i++)
+ masks[i] = i;
+
+ for (i = 0; i < 4; i++)
+ if (res[i] != val1.i [masks[i]])
+ abort ();
+}
--- /dev/null
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+#include "sse2-check.h"
+
+#include <emmintrin.h>
+
+static void
+sse2_test (void)
+{
+ union
+ {
+ __m128i x;
+ char c[16];
+ short s[8];
+ int i[4];
+ long long ll[2];
+ } val1;
+ short res[8];
+ int masks[8];
+ int i;
+
+ for (i = 0; i < 16; i++)
+ val1.c[i] = i;
+
+ res[0] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 0);
+ res[1] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 1);
+ res[2] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 2);
+ res[3] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 3);
+ res[4] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 4);
+ res[5] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 5);
+ res[6] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 6);
+ res[7] = __builtin_ia32_vec_ext_v8hi ((__v8hi)val1.x, 7);
+
+ for (i = 0; i < 8; i++)
+ masks[i] = i;
+
+ for (i = 0; i < 8; i++)
+ if (res[i] != val1.s [masks[i]])
+ abort ();
+}
--- /dev/null
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+#include "sse2-check.h"
+
+#include <emmintrin.h>
+
+static void
+sse2_test (void)
+{
+ union
+ {
+ __m128i x;
+ char c[16];
+ short s[8];
+ int i[4];
+ long long ll[2];
+ } val1;
+ char res[16];
+ int masks[16];
+ int i;
+
+ for (i = 0; i < 16; i++)
+ val1.c[i] = i;
+
+ res[0] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 0);
+ res[1] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 1);
+ res[2] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 2);
+ res[3] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 3);
+ res[4] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 4);
+ res[5] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 5);
+ res[6] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 6);
+ res[7] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 7);
+ res[8] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 8);
+ res[9] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 9);
+ res[10] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 10);
+ res[11] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 11);
+ res[12] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 12);
+ res[13] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 13);
+ res[14] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 14);
+ res[15] = __builtin_ia32_vec_ext_v16qi ((__v16qi)val1.x, 15);
+
+ for (i = 0; i < 16; i++)
+ masks[i] = i;
+
+ for (i = 0; i < 16; i++)
+ if (res[i] != val1.c [masks[i]])
+ abort ();
+}
--- /dev/null
+/* { dg-do run { target i?86-*-* x86_64-*-* } } */
+/* { dg-options "-O2 -msse2" } */
+
+#include "sse2-check.h"
+
+#include <emmintrin.h>
+#include <string.h>
+
+static void
+sse2_test (void)
+{
+ union
+ {
+ __m128i x;
+ char c[16];
+ short s[8];
+ int i[4];
+ long long ll[2];
+ } val1, res[16], tmp;
+ short ins[8] = { 8, 5, 9, 4, 2, 6, 1, 20 };
+ int masks[8];
+ int i;
+
+ for (i = 0; i < 16; i++)
+ val1.c[i] = i;
+
+ res[0].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 0);
+ res[1].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 1);
+ res[2].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 2);
+ res[3].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 3);
+ res[4].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 4);
+ res[5].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 5);
+ res[6].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 6);
+ res[7].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[0], 7);
+
+ for (i = 0; i < 8; i++)
+ masks[i] = i;
+
+ for (i = 0; i < 8; i++)
+ {
+ tmp.x = val1.x;
+ tmp.s[masks[i]] = ins[0];
+ if (memcmp (&tmp, &res[i], sizeof (tmp)))
+ abort ();
+ }
+
+ for (i = 0; i < 8; i++)
+ {
+ res[i].x = (__m128i) __builtin_ia32_vec_set_v8hi ((__v8hi)val1.x,
+ ins[i], 0);
+ masks[i] = 0;
+ }
+
+ for (i = 0; i < 8; i++)
+ {
+ tmp.x = val1.x;
+ tmp.s[masks[i]] = ins[i];
+ if (memcmp (&tmp, &res[i], sizeof (tmp)))
+ abort ();
+ }
+}
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