(mask_operand): Move mask_constant() body to here.
* rs6000.h (mask_constant): Delete declaration.
* rs6000.md (nabsdi2): Reverse subtraction in splitter.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@26925
138bc75d-0d04-0410-961f-
82ee72b054a4
+Thu May 13 15:34:18 1999 David Edelsohn <edelsohn@gnu.org>
+
+ * rs6000.c (mask_constant): Delete.
+ (mask_operand): Move mask_constant() body to here.
+ * rs6000.h (mask_constant): Delete declaration.
+ * rs6000.md (nabsdi2): Reverse subtraction in splitter.
+
Thu May 13 02:25:01 1999 Jeffrey A Law (law@cygnus.com)
* cpp.texi: Fix some typos.
&& (INTVAL (op) & (~ (HOST_WIDE_INT) 0xffff0000)) != 0);
}
-/* Return 1 if C is a constant that can be encoded in a mask on the
+/* Return 1 if C is a constant that can be encoded in a 32-bit mask on the
RS/6000. It is if there are no more than two 1->0 or 0->1 transitions.
Reject all ones and all zeros, since these should have been optimized
away and confuse the making of MB and ME. */
int
-mask_constant (c)
- register HOST_WIDE_INT c;
+mask_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode ATTRIBUTE_UNUSED;
{
+ HOST_WIDE_INT c;
int i;
int last_bit_value;
int transitions = 0;
+ if (GET_CODE (op) != CONST_INT)
+ return 0;
+
+ c = INTVAL (op);
+
if (c == 0 || c == ~0)
return 0;
return transitions <= 2;
}
-/* Return 1 if the operand is a constant that is a mask on the RS/6000. */
-
-int
-mask_operand (op, mode)
- register rtx op;
- enum machine_mode mode ATTRIBUTE_UNUSED;
-{
- return GET_CODE (op) == CONST_INT && mask_constant (INTVAL (op));
-}
-
/* Return 1 if the operand is a constant that is a PowerPC64 mask.
It is if there are no more than one 1->0 or 0->1 transitions.
Reject all ones and all zeros, since these should have been optimized
extern int non_add_cint_operand ();
extern int non_logical_cint_operand ();
extern int logical_operand ();
-extern int mask_constant ();
extern int mask_operand ();
extern int mask64_operand ();
extern int and64_operand ();
(set (match_dup 0) (minus:DI (match_dup 0) (match_dup 2)))]
"")
-(define_insn ""
+(define_insn "*nabsdi2"
[(set (match_operand:DI 0 "gpc_reg_operand" "=&r,r")
(neg:DI (abs:DI (match_operand:DI 1 "gpc_reg_operand" "r,0"))))
(clobber (match_scratch:DI 2 "=&r,&r"))]
"TARGET_POWERPC64 && reload_completed"
[(set (match_dup 2) (ashiftrt:DI (match_dup 1) (const_int 63)))
(set (match_dup 0) (xor:DI (match_dup 2) (match_dup 1)))
- (set (match_dup 0) (minus:DI (match_dup 0) (match_dup 2)))]
+ (set (match_dup 0) (minus:DI (match_dup 2) (match_dup 0)))]
"")
(define_expand "negdi2"