+2007-09-19 Jie Zhang <jie.zhang@analog.com>
+
+ * config.gcc (bfin*-linux-uclibc*): Add ./linux-sysroot-suffix.h
+ to tm_file.
+ * config/bfin/print-sysroot-suffix.sh: New.
+ * config/bfin/t-bfin-elf (EXTRA_PARTS): Remove.
+ (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES,
+ MULTILIB_EXCEPTIONS): Redefine with new multilibs.
+ * config/bfin/t-bfin-uclinux (EXTRA_PARTS): Remove.
+ (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES,
+ MULTILIB_EXCEPTIONS): Redefine with new multilibs.
+ * config/bfin/t-bfin-linux (EXTRA_PARTS): Remove.
+ (MULTILIB_OPTIONS, MULTILIB_DIRNAMES, MULTILIB_MATCHES,
+ MULTILIB_EXCEPTIONS): Redefine with new multilibs.
+ (linux-sysroot-suffix.h): New target.
+ * config/bfin/bfin.opt (mcsync-anomaly): Use Var instead of Mask.
+ (mspecld-anomaly): Likewise.
+ * config/bfin/bfin-protos.h (enum bfin_cpu_type): Renamed from
+ (enum bfin_cpu): ... this. Add BFIN_CPU_BF522, BFIN_CPU_BF525,
+ BFIN_CPU_BF527, BFIN_CPU_BF538, BFIN_CPU_BF539, BFIN_CPU_BF542,
+ BFIN_CPU_BF544, BFIN_CPU_BF548, and BFIN_CPU_BF549.
+ (bfin_si_revision): Declare.
+ (bfin_workarounds): Declare.
+ (WA_SPECULATIVE_LOADS): Define.
+ (ENABLE_WA_SPECULATIVE_LOADS): Define.
+ (WA_SPECULATIVE_SYNCS): Define.
+ (ENABLE_WA_SPECULATIVE_SYNCS): Define.
+ * config/bfin/elf.h (STARTFILE_SPEC): Rename crt532.o to basiccrt.o.
+ (LIB_SPEC): Add %s to the linker scripts.
+ Use proper linker script for bf522, bf525, bf527,
+ bf538, bf539, bf542, bf544, bf548, and bf549.
+ * config/bfin/bfin.c (bfin_si_revision): Define.
+ (bfin_workarounds): Define.
+ (struct bfin_cpu): New.
+ (bfin_cpus): New.
+ (bfin_handle_option): Handle silicon revision part of -mcpu option.
+ (override_options): Set bfin_workarounds.
+ (length_for_loop): Replace TARGET_CSYNC_ANOMALY with
+ ENABLE_WA_SPECULATIVE_SYNCS, TARGET_SPECLD_ANOMALY with
+ ENABLE_WA_SPECULATIVE_LOADS.
+ (bfin_reorg): Likewise.
+ * config/bfin/bfin.h (TARGET_CPU_CPP_BUILTINS): Define
+ macros for bf522, bf525, bf527, bf538, bf539,
+ bf542, bf544, bf548, and bf549.
+ Define __SILICON_REVISION__ and __WORKAROUND_* macros if needed.
+ Don't define __ID_SHARED_LIB__ when -msep-data.
+ (TARGET_DEFAULT): Define as 0.
+ (DRIVER_SELF_SPECS): Add -mcpu=bf532 if no -mcpu option.
+ * doc/invoke.texi (Blackfin Options): Document silicon
+ revision part of -mcpu option and it now accepts bf522, bf525,
+ bf527, bf538, bf539, bf542, bf544, bf548, and bf549.
+
2007-09-18 Kaveh R. Ghazi <ghazi@caip.rutgers.edu>
* alias.c (memory_modified_1): Deconstify.
use_collect2=no
;;
bfin*-linux-uclibc*)
- tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h linux.h bfin/linux.h"
+ tm_file="${tm_file} dbxelf.h elfos.h bfin/elf.h linux.h bfin/linux.h ./linux-sysroot-suffix.h"
tmake_file="t-slibgcc-elf-ver bfin/t-bfin-linux"
use_collect2=no
;;
#define GCC_BFIN_PROTOS_H
/* CPU type. */
-typedef enum bfin_cpu
+typedef enum bfin_cpu_type
{
+ BFIN_CPU_BF522,
+ BFIN_CPU_BF525,
+ BFIN_CPU_BF527,
BFIN_CPU_BF531,
BFIN_CPU_BF532,
BFIN_CPU_BF533,
BFIN_CPU_BF534,
BFIN_CPU_BF536,
BFIN_CPU_BF537,
+ BFIN_CPU_BF538,
+ BFIN_CPU_BF539,
+ BFIN_CPU_BF542,
+ BFIN_CPU_BF544,
+ BFIN_CPU_BF548,
+ BFIN_CPU_BF549,
BFIN_CPU_BF561
} bfin_cpu_t;
/* Value of -mcpu= */
extern bfin_cpu_t bfin_cpu_type;
+/* Value of -msi-revision= */
+extern int bfin_si_revision;
+
+extern unsigned int bfin_workarounds;
+
+/* For the anomaly 05-00-0245 */
+#define WA_SPECULATIVE_LOADS 0x00000001
+#define ENABLE_WA_SPECULATIVE_LOADS \
+ (bfin_workarounds & WA_SPECULATIVE_LOADS)
+
+/* For the anomaly 05-00-0244 */
+#define WA_SPECULATIVE_SYNCS 0x00000002
+#define ENABLE_WA_SPECULATIVE_SYNCS \
+ (bfin_workarounds & WA_SPECULATIVE_SYNCS)
+
+
#define Mmode enum machine_mode
extern rtx function_arg (CUMULATIVE_ARGS *, Mmode, tree, int);
/* -mcpu support */
bfin_cpu_t bfin_cpu_type = DEFAULT_CPU_TYPE;
+/* -msi-revision support. There are three special values:
+ -1 -msi-revision=none.
+ 0xffff -msi-revision=any. */
+int bfin_si_revision;
+
+/* The workarounds enabled */
+unsigned int bfin_workarounds = 0;
+
+struct bfin_cpu
+{
+ const char *name;
+ bfin_cpu_t type;
+ int si_revision;
+ unsigned int workarounds;
+};
+
+struct bfin_cpu bfin_cpus[] =
+{
+ {"bf522", BFIN_CPU_BF522, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf525", BFIN_CPU_BF525, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf527", BFIN_CPU_BF527, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf531", BFIN_CPU_BF531, 0x0005,
+ WA_SPECULATIVE_LOADS},
+ {"bf531", BFIN_CPU_BF531, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf531", BFIN_CPU_BF531, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {"bf532", BFIN_CPU_BF532, 0x0005,
+ WA_SPECULATIVE_LOADS},
+ {"bf532", BFIN_CPU_BF532, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf532", BFIN_CPU_BF532, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {"bf533", BFIN_CPU_BF533, 0x0005,
+ WA_SPECULATIVE_LOADS},
+ {"bf533", BFIN_CPU_BF533, 0x0004,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf533", BFIN_CPU_BF533, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {"bf534", BFIN_CPU_BF534, 0x0003,
+ WA_SPECULATIVE_LOADS},
+ {"bf534", BFIN_CPU_BF534, 0x0002,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf534", BFIN_CPU_BF534, 0x0001,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {"bf536", BFIN_CPU_BF536, 0x0003,
+ WA_SPECULATIVE_LOADS},
+ {"bf536", BFIN_CPU_BF536, 0x0002,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf536", BFIN_CPU_BF536, 0x0001,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {"bf537", BFIN_CPU_BF537, 0x0003,
+ WA_SPECULATIVE_LOADS},
+ {"bf537", BFIN_CPU_BF537, 0x0002,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf537", BFIN_CPU_BF537, 0x0001,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {"bf538", BFIN_CPU_BF538, 0x0004,
+ WA_SPECULATIVE_LOADS},
+ {"bf538", BFIN_CPU_BF538, 0x0003,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf539", BFIN_CPU_BF539, 0x0004,
+ WA_SPECULATIVE_LOADS},
+ {"bf539", BFIN_CPU_BF539, 0x0003,
+ WA_SPECULATIVE_LOADS},
+ {"bf539", BFIN_CPU_BF539, 0x0002,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf542", BFIN_CPU_BF542, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf544", BFIN_CPU_BF544, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf548", BFIN_CPU_BF548, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf549", BFIN_CPU_BF549, 0x0000,
+ WA_SPECULATIVE_LOADS},
+
+ {"bf561", BFIN_CPU_BF561, 0x0005, 0},
+ {"bf561", BFIN_CPU_BF561, 0x0003,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+ {"bf561", BFIN_CPU_BF561, 0x0002,
+ WA_SPECULATIVE_LOADS | WA_SPECULATIVE_SYNCS},
+
+ {NULL, 0, 0, 0}
+};
+
int splitting_for_sched;
static void
return true;
case OPT_mcpu_:
- if (strcmp (arg, "bf531") == 0)
- bfin_cpu_type = BFIN_CPU_BF531;
- else if (strcmp (arg, "bf532") == 0)
- bfin_cpu_type = BFIN_CPU_BF532;
- else if (strcmp (arg, "bf533") == 0)
- bfin_cpu_type = BFIN_CPU_BF533;
- else if (strcmp (arg, "bf534") == 0)
- bfin_cpu_type = BFIN_CPU_BF534;
- else if (strcmp (arg, "bf536") == 0)
- bfin_cpu_type = BFIN_CPU_BF536;
- else if (strcmp (arg, "bf537") == 0)
- bfin_cpu_type = BFIN_CPU_BF537;
- else if (strcmp (arg, "bf561") == 0)
- {
+ {
+ const char *p, *q;
+ int i;
+
+ i = 0;
+ while ((p = bfin_cpus[i].name) != NULL)
+ {
+ if (strncmp (arg, p, strlen (p)) == 0)
+ break;
+ i++;
+ }
+
+ if (p == NULL)
+ {
+ error ("-mcpu=%s is not valid", arg);
+ return false;
+ }
+
+ bfin_cpu_type = bfin_cpus[i].type;
+
+ q = arg + strlen (p);
+
+ if (*q == '\0')
+ {
+ bfin_si_revision = bfin_cpus[i].si_revision;
+ bfin_workarounds |= bfin_cpus[i].workarounds;
+ }
+ else if (strcmp (q, "-none") == 0)
+ bfin_si_revision = -1;
+ else if (strcmp (q, "-any") == 0)
+ {
+ bfin_si_revision = 0xffff;
+ while (bfin_cpus[i].type == bfin_cpu_type)
+ {
+ bfin_workarounds |= bfin_cpus[i].workarounds;
+ i++;
+ }
+ }
+ else
+ {
+ unsigned int si_major, si_minor;
+ int rev_len, n;
+
+ rev_len = strlen (q);
+
+ if (sscanf (q, "-%u.%u%n", &si_major, &si_minor, &n) != 2
+ || n != rev_len
+ || si_major > 0xff || si_minor > 0xff)
+ {
+ invalid_silicon_revision:
+ error ("-mcpu=%s has invalid silicon revision", arg);
+ return false;
+ }
+
+ bfin_si_revision = (si_major << 8) | si_minor;
+
+ while (bfin_cpus[i].type == bfin_cpu_type
+ && bfin_cpus[i].si_revision != bfin_si_revision)
+ i++;
+
+ if (bfin_cpus[i].type != bfin_cpu_type)
+ goto invalid_silicon_revision;
+
+ bfin_workarounds |= bfin_cpus[i].workarounds;
+ }
+
+ if (bfin_cpu_type == BFIN_CPU_BF561)
warning (0, "bf561 support is incomplete yet.");
- bfin_cpu_type = BFIN_CPU_BF561;
- }
- else
- return false;
- return true;
+
+ return true;
+ }
default:
return true;
void
override_options (void)
{
+ if (bfin_csync_anomaly == 1)
+ bfin_workarounds |= WA_SPECULATIVE_SYNCS;
+ else if (bfin_csync_anomaly == 0)
+ bfin_workarounds &= ~WA_SPECULATIVE_SYNCS;
+
+ if (bfin_specld_anomaly == 1)
+ bfin_workarounds |= WA_SPECULATIVE_LOADS;
+ else if (bfin_specld_anomaly == 0)
+ bfin_workarounds &= ~WA_SPECULATIVE_LOADS;
+
if (TARGET_OMIT_LEAF_FRAME_POINTER)
flag_omit_frame_pointer = 1;
int length = 0;
if (JUMP_P (insn) && any_condjump_p (insn) && !optimize_size)
{
- if (TARGET_CSYNC_ANOMALY)
+ if (ENABLE_WA_SPECULATIVE_SYNCS)
length = 8;
- else if (TARGET_SPECLD_ANOMALY)
+ else if (ENABLE_WA_SPECULATIVE_LOADS)
length = 6;
}
else if (LABEL_P (insn))
{
- if (TARGET_CSYNC_ANOMALY)
+ if (ENABLE_WA_SPECULATIVE_SYNCS)
length = 4;
}
if (cfun->machine->has_hardware_loops)
bfin_reorg_loops (dump_file);
- if (! TARGET_SPECLD_ANOMALY && ! TARGET_CSYNC_ANOMALY)
+ if (! ENABLE_WA_SPECULATIVE_LOADS && ! ENABLE_WA_SPECULATIVE_SYNCS)
return;
/* First pass: find predicted-false branches; if something after them
if (cycles_since_jump < INT_MAX)
cycles_since_jump++;
- if (load_insn && TARGET_SPECLD_ANOMALY)
+ if (load_insn && ENABLE_WA_SPECULATIVE_LOADS)
{
if (trapping_loads_p (load_insn))
delay_needed = 3;
}
- else if (type == TYPE_SYNC && TARGET_CSYNC_ANOMALY)
+ else if (type == TYPE_SYNC && ENABLE_WA_SPECULATIVE_SYNCS)
delay_needed = 4;
if (delay_needed > cycles_since_jump)
}
/* Second pass: for predicted-true branches, see if anything at the
branch destination needs extra nops. */
- if (! TARGET_CSYNC_ANOMALY)
+ if (! ENABLE_WA_SPECULATIVE_SYNCS)
return;
for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
if (cycles_since_jump < INT_MAX)
cycles_since_jump++;
- if (type == TYPE_SYNC && TARGET_CSYNC_ANOMALY)
+ if (type == TYPE_SYNC && ENABLE_WA_SPECULATIVE_SYNCS)
delay_needed = 2;
if (delay_needed > cycles_since_jump)
/* Predefinition in the preprocessor for this target machine */
#ifndef TARGET_CPU_CPP_BUILTINS
-#define TARGET_CPU_CPP_BUILTINS() \
- do \
- { \
- builtin_define_std ("bfin"); \
- builtin_define_std ("BFIN"); \
+#define TARGET_CPU_CPP_BUILTINS() \
+ do \
+ { \
+ builtin_define_std ("bfin"); \
+ builtin_define_std ("BFIN"); \
builtin_define ("__ADSPBLACKFIN__"); \
builtin_define ("__ADSPLPBLACKFIN__"); \
\
switch (bfin_cpu_type) \
{ \
+ case BFIN_CPU_BF522: \
+ builtin_define ("__ADSPBF522__"); \
+ builtin_define ("__ADSPBF52x__"); \
+ break; \
+ case BFIN_CPU_BF525: \
+ builtin_define ("__ADSPBF525__"); \
+ builtin_define ("__ADSPBF52x__"); \
+ break; \
+ case BFIN_CPU_BF527: \
+ builtin_define ("__ADSPBF527__"); \
+ builtin_define ("__ADSPBF52x__"); \
+ break; \
case BFIN_CPU_BF531: \
builtin_define ("__ADSPBF531__"); \
break; \
case BFIN_CPU_BF537: \
builtin_define ("__ADSPBF537__"); \
break; \
+ case BFIN_CPU_BF538: \
+ builtin_define ("__ADSPBF538__"); \
+ break; \
+ case BFIN_CPU_BF539: \
+ builtin_define ("__ADSPBF539__"); \
+ break; \
+ case BFIN_CPU_BF542: \
+ builtin_define ("__ADSPBF542__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
+ case BFIN_CPU_BF544: \
+ builtin_define ("__ADSPBF544__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
+ case BFIN_CPU_BF548: \
+ builtin_define ("__ADSPBF548__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
+ case BFIN_CPU_BF549: \
+ builtin_define ("__ADSPBF549__"); \
+ builtin_define ("__ADSPBF54x__"); \
+ break; \
case BFIN_CPU_BF561: \
builtin_define ("__ADSPBF561__"); \
break; \
} \
\
+ if (bfin_si_revision != -1) \
+ { \
+ /* space of 0xnnnn and a NUL */ \
+ char *buf = alloca (7); \
+ \
+ sprintf (buf, "0x%04x", bfin_si_revision); \
+ builtin_define_with_value ("__SILICON_REVISION__", buf, 0); \
+ } \
+ \
+ if (bfin_workarounds) \
+ builtin_define ("__WORKAROUNDS_ENABLED"); \
+ if (ENABLE_WA_SPECULATIVE_LOADS) \
+ builtin_define ("__WORKAROUND_SPECULATIVE_LOADS"); \
+ if (ENABLE_WA_SPECULATIVE_SYNCS) \
+ builtin_define ("__WORKAROUND_SPECULATIVE_SYNCS"); \
+ \
if (TARGET_FDPIC) \
builtin_define ("__BFIN_FDPIC__"); \
- if (TARGET_ID_SHARED_LIBRARY) \
+ if (TARGET_ID_SHARED_LIBRARY \
+ && !TARGET_SEP_DATA) \
builtin_define ("__ID_SHARED_LIB__"); \
if (flag_no_builtin) \
builtin_define ("__NO_BUILTIN"); \
- } \
+ } \
while (0)
#endif
#define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS "\
+ %{!mcpu=*:-mcpu=bf532} \
%{mleaf-id-shared-library:%{!mid-shared-library:-mid-shared-library}} \
%{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\
%{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fpie}}}}}}}}} \
/* Generate DSP instructions, like DSP halfword loads */
#define TARGET_DSP (1)
-#define TARGET_DEFAULT (MASK_SPECLD_ANOMALY | MASK_CSYNC_ANOMALY)
+#define TARGET_DEFAULT 0
/* Maximum number of library ids we permit */
#define MAX_LIBRARY_ID 255
Program is entirely located in low 64k of memory
mcsync-anomaly
-Target Report Mask(CSYNC_ANOMALY)
+Target Report Var(bfin_csync_anomaly) Init(-1)
Work around a hardware anomaly by adding a number of NOPs before a
CSYNC or SSYNC instruction.
mspecld-anomaly
-Target Report Mask(SPECLD_ANOMALY)
+Target Report Var(bfin_specld_anomaly) Init(-1)
Avoid speculative loads to work around a hardware anomaly.
mid-shared-library
#undef STARTFILE_SPEC
#define STARTFILE_SPEC "\
%{msim:%{!shared:crt0%O%s}} \
-%{!msim:%{mcpu=bf531|mcpu=bf532|mcpu=bf533 \
- |mcpu=bf534|mcpu=bf536|mcpu=bf537:crt532%O%s} \
- %{!mcpu=*:crt532%O%s}} \
+%{!msim:basiccrt%O%s} \
crti%O%s crtbegin%O%s crtlibid%O%s"
#undef ENDFILE_SPEC
#undef LIB_SPEC
#define LIB_SPEC "--start-group -lc %{msim:-lsim}%{!msim:-lnosys} --end-group \
-%{!T*:%{!msim:%{mcpu=bf531:-Tbf531.ld}%{mcpu=bf532:-Tbf532.ld} \
- %{mcpu=bf533:-Tbf533.ld}%{mcpu=bf534:-Tbf534.ld} \
- %{mcpu=bf536:-Tbf536.ld}%{mcpu=bf537:-Tbf537.ld} \
- %{!mcpu=*:-Tbf532.ld}}}"
+%{!T*:%{!msim:%{mcpu=bf522*:-T bf522.ld%s}%{mcpu=bf525*:-T bf525.ld%s} \
+ %{mcpu=bf527*:-T bf527.ld%s} \
+ %{mcpu=bf531*:-T bf531.ld%s}%{mcpu=bf532*:-T bf532.ld%s} \
+ %{mcpu=bf533*:-T bf533.ld%s}%{mcpu=bf534*:-T bf534.ld%s} \
+ %{mcpu=bf536*:-T bf536.ld%s}%{mcpu=bf537*:-T bf537.ld%s} \
+ %{mcpu=bf538*:-T bf538.ld%s}%{mcpu=bf539*:-T bf539.ld%s} \
+ %{mcpu=bf542*:-T bf542.ld%s}%{mcpu=bf544*:-T bf544.ld%s} \
+ %{mcpu=bf548*:-T bf548.ld%s}%{mcpu=bf549*:-T bf549.ld%s} \
+ %{!mcpu=*:-T bf532.ld%s} \
+ -T bfin-common-sc.ld%s}}"
#undef USER_LABEL_PREFIX
#define USER_LABEL_PREFIX "_"
--- /dev/null
+#!/bin/sh
+# Copyright (C) 2007 Free Software Foundation, Inc.
+# This file is part of GCC.
+
+# GCC is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+
+# GCC is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# This script takes the following arguments:
+#
+# - the target sysroot
+# - the value of $(MULTILIB_MATCHES)
+# - the value of $(MULTILIB_OPTIONS)
+#
+# It uses these arguments to construct a definition of SYSROOT_SUFFIX_SPEC,
+# which it prints to the standard output. For each multilib directory FOO,
+# the script checks whether $sysroot has a subdirectory FOO, and if so will
+# use /FOO for all compatible command-line options. It will not add a
+# suffix for /FOO's options otherwise. These suffixes are concatenated,
+# with one subspec for each space-separated entry in $(MULTILIB_OPTIONS).
+set -e
+sysroot=$1
+matches=$2
+options=$3
+
+# For each multilib option OPT, add to $substs a sed command of the
+# form "-e 's/OPT/OPT/'".
+substs=""
+for option in `echo "$options" | tr '/' ' '`
+do
+ substs="$substs -e 's/$option/$option/g'"
+done
+
+# For each ALIAS=CANONICAL entry in $MULTILIB_MATCHES, look for sed
+# arguments in $substs of the form "-e 's/CANONICAL/.../'". Replace
+# such entries with "-e 's/CANONICAL/ALIAS|.../'". Both the ALIAS and
+# CANONICAL parts of $MULTILIB_MATCHES use '?' to stand for '='.
+#
+# After this loop, a command of the form "echo FOO | eval sed $substs"
+# will replace a canonical option FOO with a %{...}-style spec pattern.
+for match in $matches
+do
+ canonical=`echo "$match" | sed -e 's/=.*//' -e 's/?/=/g'`
+ alias=`echo "$match" | sed -e 's/.*=//' -e 's/?/=/g'`
+ substs=`echo "$substs" | sed -e "s,s/$canonical/,&$alias|,"`
+done
+
+# Build up the final SYSROOT_SUFFIX_SPEC in $spec.
+spec=
+for combo in $options
+do
+ # See which option alternatives in $combo have their own sysroot
+ # directory. Create a subspec of the form "%{PAT1:/DIR1;...;PATn:DIRn}"
+ # from each such option OPTi, where DIRi is the directory associated
+ # with OPTi and PATi is the result of passing OPTi through $substs.
+ subspec=
+ for option in `echo "$combo" | tr '/' ' '`
+ do
+ dir=`echo "$option" | sed 's/mcpu=//'`
+ if test -d "$sysroot/$dir"; then
+ test -z "$subspec" || subspec="$subspec;"
+ subspec="$subspec"`echo "$option" | eval sed $substs`":/$dir"
+ fi
+ done
+ # Concatenate all the subspecs.
+ test -z "$subspec" || spec="$spec%{$subspec}"
+done
+if test -n "$spec"; then
+ echo "#undef SYSROOT_SUFFIX_SPEC"
+ echo "#define SYSROOT_SUFFIX_SPEC \"$spec\""
+fi
LIB1ASMFUNCS = _divsi3 _udivsi3 _umodsi3 _modsi3 _umulsi3_highpart
LIB1ASMFUNCS += _smulsi3_highpart
-EXTRA_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crti.o crtn.o crtlibid.o
-
FPBIT = fp-bit.c
DPBIT = dp-bit.c
CRTSTUFF_T_CFLAGS = -fpic
TARGET_LIBGCC2_CFLAGS = -fpic
-MULTILIB_OPTIONS=mid-shared-library mleaf-id-shared-library
-MULTILIB_OPTIONS+=msep-data mfdpic
-MULTILIB_DEFAULTS=
-MULTILIB_DIRNAMES=
-MULTILIB_EXCEPTIONS=mid-shared-library*/mfdpic mleaf-id-shared-library*
-MULTILIB_EXCEPTIONS+=*msep-data*
+MULTILIB_OPTIONS=mcpu=bf532-none/mcpu=bf532-0.3
+MULTILIB_OPTIONS+=mid-shared-library/msep-data/mfdpic mleaf-id-shared-library
+MULTILIB_DIRNAMES=bf532-none bf532-0.3 mid-shared-library msep-data mfdpic mleaf-id-shared-library
+MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf561
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none mcpu?bf532-none=mcpu?bf534-none mcpu?bf532-none=mcpu?bf536-none mcpu?bf532-none=mcpu?bf537-none mcpu?bf532-none=mcpu?bf561-none mcpu?bf532-none=mcpu?bf561-0.5
+MULTILIB_MATCHES+=mcpu?bf532-0.3=mcpu?bf531-0.4 mcpu?bf532-0.3=mcpu?bf531-0.3 mcpu?bf532-0.3=mcpu?bf532-0.4 mcpu?bf532-0.3=mcpu?bf534-0.4 mcpu?bf532-0.3=mcpu?bf534-0.3 mcpu?bf532-0.3=mcpu?bf534-0.2 mcpu?bf532-0.3=mcpu?bf534-0.1 mcpu?bf532-0.3=mcpu?bf536-0.2 mcpu?bf532-0.3=mcpu?bf536-0.1 mcpu?bf532-0.3=mcpu?bf537-0.2 mcpu?bf532-0.3=mcpu?bf537-0.1 mcpu?bf532-0.3=mcpu?bf561-0.3 mcpu?bf532-0.3=mcpu?bf561-0.2 mcpu?bf532-0.3=mcpu?bf531-any mcpu?bf532-0.3=mcpu?bf532-any mcpu?bf532-0.3=mcpu?bf533-any mcpu?bf532-0.3=mcpu?bf534-any mcpu?bf532-0.3=mcpu?bf536-any mcpu?bf532-0.3=mcpu?bf537-any mcpu?bf532-0.3=mcpu?bf561-any
+MULTILIB_EXCEPTIONS=mleaf-id-shared-library*
+MULTILIB_EXCEPTIONS+=mcpu=bf532-0.3/mleaf-id-shared-library*
+MULTILIB_EXCEPTIONS+=mcpu=bf532-none/mleaf-id-shared-library*
+MULTILIB_EXCEPTIONS+=*mfdpic/mleaf-id-shared-library*
+MULTILIB_EXCEPTIONS+=*msep-data/mleaf-id-shared-library*
# Assemble startup files.
$(T)crti.o: $(srcdir)/config/bfin/crti.s $(GCC_PASSES)
LIB1ASMFUNCS = _divsi3 _udivsi3 _umodsi3 _modsi3 _umulsi3_highpart
LIB1ASMFUNCS += _smulsi3_highpart
-EXTRA_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o
-
FPBIT = fp-bit.c
DPBIT = dp-bit.c
CRTSTUFF_T_CFLAGS = -fpic
TARGET_LIBGCC2_CFLAGS = -fpic
+MULTILIB_OPTIONS=mcpu=bf532-none/mcpu=bf532-0.3
+MULTILIB_DIRNAMES=bf532-none bf532-0.3
+MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf561
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none mcpu?bf532-none=mcpu?bf534-none mcpu?bf532-none=mcpu?bf536-none mcpu?bf532-none=mcpu?bf537-none mcpu?bf532-none=mcpu?bf561-none mcpu?bf532-none=mcpu?bf561-0.5
+MULTILIB_MATCHES+=mcpu?bf532-0.3=mcpu?bf531-0.4 mcpu?bf532-0.3=mcpu?bf531-0.3 mcpu?bf532-0.3=mcpu?bf532-0.4 mcpu?bf532-0.3=mcpu?bf533-0.4 mcpu?bf532-0.3=mcpu?bf533-0.3 mcpu?bf532-0.3=mcpu?bf534-0.2 mcpu?bf532-0.3=mcpu?bf534-0.1 mcpu?bf532-0.3=mcpu?bf536-0.2 mcpu?bf532-0.3=mcpu?bf536-0.1 mcpu?bf532-0.3=mcpu?bf537-0.2 mcpu?bf532-0.3=mcpu?bf537-0.1 mcpu?bf532-0.3=mcpu?bf561-0.3 mcpu?bf532-0.3=mcpu?bf561-0.2 mcpu?bf532-0.3=mcpu?bf531-any mcpu?bf532-0.3=mcpu?bf532-any mcpu?bf532-0.3=mcpu?bf533-any mcpu?bf532-0.3=mcpu?bf534-any mcpu?bf532-0.3=mcpu?bf536-any mcpu?bf532-0.3=mcpu?bf537-any mcpu?bf532-0.3=mcpu?bf561-any
+
# Assemble startup files.
$(T)crti.o: $(srcdir)/config/bfin/crti.s $(GCC_PASSES)
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
$(GCC_FOR_TARGET) $(GCC_CFLAGS) $(MULTILIB_CFLAGS) $(INCLUDES) \
-c -o $(T)crtn.o -x assembler-with-cpp $(srcdir)/config/bfin/crtn.s
-EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o
-
SHLIB_MAPFILES=$(srcdir)/config/bfin/libgcc-bfin.ver
+EXTRA_MULTILIB_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crti.o crtn.o
+
+# This rule uses MULTILIB_MATCHES to generate a definition of
+# SYSROOT_SUFFIX_SPEC.
+linux-sysroot-suffix.h: $(srcdir)/config/bfin/print-sysroot-suffix.sh
+ $(SHELL) $(srcdir)/config/bfin/print-sysroot-suffix.sh \
+ "$(SYSTEM_HEADER_DIR)/../.." "$(MULTILIB_MATCHES)" \
+ "$(MULTILIB_OPTIONS)" > $@
LIB1ASMFUNCS = _divsi3 _udivsi3 _umodsi3 _modsi3 _umulsi3_highpart
LIB1ASMFUNCS += _smulsi3_highpart
-EXTRA_PARTS = crtbegin.o crtend.o crtbeginS.o crtendS.o crti.o crtn.o crtlibid.o
-
FPBIT = fp-bit.c
DPBIT = dp-bit.c
CRTSTUFF_T_CFLAGS = -fpic
TARGET_LIBGCC2_CFLAGS = -fpic
-MULTILIB_OPTIONS=mid-shared-library mleaf-id-shared-library
-MULTILIB_OPTIONS+=msep-data
-MULTILIB_DEFAULTS=
-MULTILIB_DIRNAMES=
+MULTILIB_OPTIONS=mcpu=bf532-none/mcpu=bf532-0.3
+MULTILIB_OPTIONS+=mid-shared-library/msep-data mleaf-id-shared-library
+MULTILIB_DIRNAMES=bf532-none bf532-0.3 mid-shared-library msep-data mleaf-id-shared-library
+MULTILIB_MATCHES=mcpu?bf532-none=mcpu?bf561
+MULTILIB_MATCHES+=mcpu?bf532-none=mcpu?bf531-none mcpu?bf532-none=mcpu?bf533-none mcpu?bf532-none=mcpu?bf534-none mcpu?bf532-none=mcpu?bf536-none mcpu?bf532-none=mcpu?bf537-none mcpu?bf532-none=mcpu?bf561-none mcpu?bf532-none=mcpu?bf561-0.5
+MULTILIB_MATCHES+=mcpu?bf532-0.3=mcpu?bf531-0.4 mcpu?bf532-0.3=mcpu?bf531-0.3 mcpu?bf532-0.3=mcpu?bf532-0.4 mcpu?bf532-0.3=mcpu?bf533-0.4 mcpu?bf532-0.3=mcpu?bf533-0.3 mcpu?bf532-0.3=mcpu?bf534-0.2 mcpu?bf532-0.3=mcpu?bf534-0.1 mcpu?bf532-0.3=mcpu?bf536-0.2 mcpu?bf532-0.3=mcpu?bf536-0.1 mcpu?bf532-0.3=mcpu?bf537-0.2 mcpu?bf532-0.3=mcpu?bf537-0.1 mcpu?bf532-0.3=mcpu?bf561-0.3 mcpu?bf532-0.3=mcpu?bf561-0.2 mcpu?bf532-0.3=mcpu?bf531-any mcpu?bf532-0.3=mcpu?bf532-any mcpu?bf532-0.3=mcpu?bf533-any mcpu?bf532-0.3=mcpu?bf534-any mcpu?bf532-0.3=mcpu?bf536-any mcpu?bf532-0.3=mcpu?bf537-any mcpu?bf532-0.3=mcpu?bf561-any
MULTILIB_EXCEPTIONS=mleaf-id-shared-library*
-MULTILIB_EXCEPTIONS+=*msep-data*
+MULTILIB_EXCEPTIONS+=mcpu=bf532-0.3/mleaf-id-shared-library*
+MULTILIB_EXCEPTIONS+=mcpu=bf532-none/mleaf-id-shared-library*
+MULTILIB_EXCEPTIONS+=*msep-data/mleaf-id-shared-library*
# Assemble startup files.
$(T)crti.o: $(srcdir)/config/bfin/crti.s $(GCC_PASSES)
-mcall-prologues -mno-tablejump -mtiny-stack -mint8}
@emph{Blackfin Options}
-@gccoptlist{-mcpu=@var{cpu} -msim -momit-leaf-frame-pointer @gol
--mno-omit-leaf-frame-pointer -mspecld-anomaly -mno-specld-anomaly @gol
--mcsync-anomaly -mno-csync-anomaly -mlow-64k -mno-low64k @gol
--mstack-check-l1 -mid-shared-library -mno-id-shared-library @gol
--mshared-library-id=@var{n} -mleaf-id-shared-library @gol
--mno-leaf-id-shared-library -msep-data -mno-sep-data -mlong-calls @gol
--mno-long-calls -mfast-fp -minline-plt}
+@gccoptlist{-mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]} @gol
+-msim -momit-leaf-frame-pointer -mno-omit-leaf-frame-pointer @gol
+-mspecld-anomaly -mno-specld-anomaly -mcsync-anomaly -mno-csync-anomaly @gol
+-mlow-64k -mno-low64k -mstack-check-l1 -mid-shared-library @gol
+-mno-id-shared-library -mshared-library-id=@var{n} @gol
+-mleaf-id-shared-library -mno-leaf-id-shared-library @gol
+-msep-data -mno-sep-data -mlong-calls -mno-long-calls @gol
+-mfast-fp -minline-plt}
@emph{CRIS Options}
@gccoptlist{-mcpu=@var{cpu} -march=@var{cpu} -mtune=@var{cpu} @gol
@cindex Blackfin Options
@table @gcctabopt
-@item -mcpu=@var{cpu}
+@item -mcpu=@var{cpu}@r{[}-@var{sirevision}@r{]}
@opindex mcpu=
-Specifies the name of the target Blackfin processor. Currently, @var{cpu}
-can be one of @samp{bf531}, @samp{bf532}, @samp{bf533},
-@samp{bf534}, @samp{bf536}, @samp{bf537}, @samp{bf561}.
+Specifies the name of the target Blackfin processor. Currently, @var{cpu}
+can be one of @samp{bf522}, @samp{bf525}, @samp{bf527},
+@samp{bf531}, @samp{bf532}, @samp{bf533}, @samp{bf534},
+@samp{bf536}, @samp{bf537}, @samp{bf538}, @samp{bf539},
+@samp{bf542}, @samp{bf544}, @samp{bf548}, @samp{bf549},
+@samp{bf561}.
+The optional @var{sirevision} specifies the silicon revision of the target
+Blackfin processor. Any workarounds available for the targeted silicon revision
+will be enabled. If @var{sirevision} is @samp{none}, no workarounds are enabled.
+If @var{sirevision} is @samp{any}, all workarounds for the targeted processor
+will be enabled. The @code{__SILICON_REVISION__} macro is defined to two
+hexadecimal digits representing the major and minor numbers in the silicon
+revision. If @var{sirevision} is @samp{none}, the @code{__SILICON_REVISION__}
+is not defined. If @var{sirevision} is @samp{any}, the
+@code{__SILICON_REVISION__} is defined to be @code{0xffff}.
+If this optional @var{sirevision} is not used, GCC assumes the latest known
+silicon revision of the targeted Blackfin processor.
+
+Support for @samp{bf561} is incomplete. For @samp{bf561},
+Only the processor macro is defined.
Without this option, @samp{bf532} is used as the processor by default.
The corresponding predefined processor macros for @var{cpu} is to
-be defined. For the @samp{bfin-elf} toolchain, this causes the hardware
-BSP provided by libgloss to be linked in if @samp{-msim} is not given.
-Support for @samp{bf561} is incomplete; only the processor macro is defined.
+be defined. And for @samp{bfin-elf} toolchain, this causes the hardware BSP
+provided by libgloss to be linked in if @option{-msim} is not given.
@item -msim
@opindex msim
@item -mspecld-anomaly
@opindex mspecld-anomaly
When enabled, the compiler will ensure that the generated code does not
-contain speculative loads after jump instructions. This option is enabled
-by default.
+contain speculative loads after jump instructions. If this option is used,
+@code{__WORKAROUND_SPECULATIVE_LOADS} is defined.
@item -mno-specld-anomaly
@opindex mno-specld-anomaly
@opindex mcsync-anomaly
When enabled, the compiler will ensure that the generated code does not
contain CSYNC or SSYNC instructions too soon after conditional branches.
-This option is enabled by default.
+If this option is used, @code{__WORKAROUND_SPECULATIVE_SYNCS} is defined.
@item -mno-csync-anomaly
@opindex mno-csync-anomaly
+2007-09-19 Jie Zhang <jie.zhang@analog.com>
+
+ * gcc.target/bfin/bfin.exp: New.
+ * gcc.target/bfin/{workarounds-any.c, workarounds-none.c,
+ workarounds-1.c, workarounds-2.c, workarounds-3.c, workarounds-4.c,
+ mcpu-bf522.c, mcpu-bf525.c, mcpu-bf527.c,
+ mcpu-bf531.c, mcpu-bf532.c, mcpu-bf533.c,
+ mcpu-bf534.c, mcpu-bf536.c, mcpu-bf537.c,
+ mcpu-bf538.c, mcpu-bf539.c, mcpu-bf542.c,
+ mcpu-bf544.c, mcpu-bf548.c, mcpu-bf549.c,
+ mcpu-bf561.c, mcpu-default.c}: New tests.
+
2007-09-18 Sandra Loosemore <sandra@codesourcery.com>
Restore detection of unsupported TLS.
-# Tests for the Blackfin
+# Copyright (C) 2007 Free Software Foundation, Inc.
-if {![istarget bfin-*]} {
- return 0
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GCC; see the file COPYING3. If not see
+# <http://www.gnu.org/licenses/>.
+
+# GCC testsuite that uses the `dg.exp' driver.
+
+# Exit immediately if this isn't an BFIN target.
+if ![istarget bfin-*-*] then {
+ return
}
+# Load support procs.
load_lib gcc-dg.exp
-# If a testcase doesn't have special options, use these.
-global DEFAULT_CFLAGS
-if ![info exists DEFAULT_CFLAGS] then {
- set DEFAULT_CFLAGS " -ansi -pedantic-errors"
+# Like dg-options, but treats certain Blackfin-specific options specially:
+#
+# -mcpu=*
+# Select the target cpu. Skip the test if the multilib flags force
+# a different cpu.
+proc dg-bfin-options {args} {
+ upvar dg-extra-tool-flags extra_tool_flags
+ upvar dg-do-what do_what
+
+ set multilib_cpu ""
+ set cpu ""
+
+ foreach flag [target_info multilib_flags] {
+ regexp "^-mcpu=(.*)" $flag dummy multilib_cpu
+ }
+
+ set flags [lindex $args 1]
+
+ foreach flag $flags {
+ regexp "^-mcpu=(.*)" $flag dummy cpu
+ }
+
+ if {$multilib_cpu == "" || $multilib_cpu == $cpu} {
+ set extra_tool_flags $flags
+ } else {
+ set do_what [list [lindex $do_what 0] "N" "P"]
+ }
}
# Initialize `dg'.
dg-init
# Main loop.
-dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cS\]]] \
- "" $DEFAULT_CFLAGS
+dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.\[cCS\]]] "" ""
# All done.
dg-finish
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf522" } */
+
+#ifndef __ADSPBF522__
+#error "__ADSPBF522__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf525" } */
+
+#ifndef __ADSPBF525__
+#error "__ADSPBF525__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf527" } */
+
+#ifndef __ADSPBF527__
+#error "__ADSPBF527__ is not defined"
+#endif
+
+#ifndef __ADSPBF52x__
+#error "__ADSPBF52x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf531" } */
+
+#ifndef __ADSPBF531__
+#error "__ADSPBF531__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf532" } */
+
+#ifndef __ADSPBF532__
+#error "__ADSPBF532__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf533" } */
+
+#ifndef __ADSPBF533__
+#error "__ADSPBF533__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf534" } */
+
+#ifndef __ADSPBF534__
+#error "__ADSPBF534__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf536" } */
+
+#ifndef __ADSPBF536__
+#error "__ADSPBF536__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf538" } */
+
+#ifndef __ADSPBF538__
+#error "__ADSPBF538__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf539" } */
+
+#ifndef __ADSPBF539__
+#error "__ADSPBF539__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0004
+#error "__SILICON_REVISION__ is not 0x0004"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf542" } */
+
+#ifndef __ADSPBF542__
+#error "__ADSPBF542__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf544" } */
+
+#ifndef __ADSPBF544__
+#error "__ADSPBF544__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf548" } */
+
+#ifndef __ADSPBF548__
+#error "__ADSPBF548__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf549" } */
+
+#ifndef __ADSPBF549__
+#error "__ADSPBF549__ is not defined"
+#endif
+
+#ifndef __ADSPBF54x__
+#error "__ADSPBF54x__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0000
+#error "__SILICON_REVISION__ is not 0x0000"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf561" } */
+
+#ifndef __ADSPBF561__
+#error "__ADSPBF561__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifdef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "" } */
+
+#ifndef __ADSPBF532__
+#error "__ADSPBF532__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0005
+#error "__SILICON_REVISION__ is not 0x0005"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcsync-anomaly -mcpu=bf537" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mno-specld-anomaly -mcpu=bf537" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0x0003
+#error "__SILICON_REVISION__ is not 0x0003"
+#endif
+
+#ifdef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-none" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#ifdef __SILICON_REVISION__
+#error "__SILICON_REVISION__ is defined"
+#endif
+
+#ifdef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-any" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0xffff
+#error "__SILICON_REVISION__ is not 0xffff"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-any" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#if __SILICON_REVISION__ != 0xffff
+#error "__SILICON_REVISION__ is not 0xffff"
+#endif
+
+#ifndef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is not defined"
+#endif
+
+#ifndef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
--- /dev/null
+/* Test for -mcpu=. */
+/* { dg-do preprocess } */
+/* { dg-bfin-options "-mcpu=bf537-none" } */
+
+#ifndef __ADSPBF537__
+#error "__ADSPBF537__ is not defined"
+#endif
+
+#ifdef __SILICON_REVISION__
+#error "__SILICON_REVISION__ is defined"
+#endif
+
+#ifdef __WORKAROUNDS_ENABLED
+#error "__WORKAROUNDS_ENABLED is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_LOADS
+#error "__WORKAROUND_SPECULATIVE_LOADS is defined"
+#endif
+
+#ifdef __WORKAROUND_SPECULATIVE_SYNCS
+#error "__WORKAROUND_SPECULATIVE_SYNCS is defined"
+#endif
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