* reload1.c (eliminate_regs_in_insn): Merge the plus_src "else" and

	the offset == 0 "then" clauses.
	* config/rs6000/predicates.md (gpc_reg_operand): Check for
	reload_in_progress.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@119800 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 9513dcd..61fb81a 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2006-12-12  Peter Bergner  <bergner@vnet.ibm.com>
+
+       * reload1.c (eliminate_regs_in_insn): Merge the plus_src "else" and
+       the offset == 0 "then" clauses.
+       * config/rs6000/predicates.md (gpc_reg_operand): Check for
+       reload_in_progress.
+
 2006-12-12  Marcin Dalecki  <martin@dalecki.de>
 
        * doc/passes.texi: remove docs about "redundant PHI removal".

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 6aefe2d..0b4f7df 100644 (file)
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -81,10 +81,13 @@
   (and (match_code "const_int")
        (match_test "INTVAL (op) > 0 && exact_log2 (INTVAL (op)) >= 0")))
 
-;; Return 1 if op is a register that is not special.
+;; Return 1 if op is a register that is not special.  We accept anything
+;; during reload_in_progress since eliminate_regs_in_insn() sometimes
+;; creates invalid insns which will be fixed up later in reload.
 (define_predicate "gpc_reg_operand"
    (and (match_operand 0 "register_operand")
-       (match_test "(GET_CODE (op) != REG
+       (match_test "(reload_in_progress
+                     || GET_CODE (op) != REG
                      || (REGNO (op) >= ARG_POINTER_REGNUM
                          && !XER_REGNO_P (REGNO (op)))
                      || REGNO (op) < MQ_REGNO)

diff --git a/gcc/reload1.c b/gcc/reload1.c
index 4543835..7ba93a6 100644 (file)
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -3098,7 +3098,12 @@ eliminate_regs_in_insn (rtx insn, int replace)
            if (GET_CODE (XEXP (plus_cst_src, 0)) == SUBREG)
              to_rtx = gen_lowpart (GET_MODE (XEXP (plus_cst_src, 0)),
                                    to_rtx);
-           if (offset == 0)
+           /* If we have a nonzero offset, and the source is already
+              a simple REG, the following transformation would
+              increase the cost of the insn by replacing a simple REG
+              with (plus (reg sp) CST).  So try only when we already
+              had a PLUS before.  */
+           if (offset == 0 || plus_src)
              {
                int num_clobbers;
                /* We assume here that if we need a PARALLEL with
@@ -3107,7 +3112,7 @@ eliminate_regs_in_insn (rtx insn, int replace)
                   There's not much we can do if that doesn't work.  */
                PATTERN (insn) = gen_rtx_SET (VOIDmode,
                                              SET_DEST (old_set),
-                                             to_rtx);
+                                             plus_constant (to_rtx, offset));
                num_clobbers = 0;
                INSN_CODE (insn) = recog (PATTERN (insn), insn, &num_clobbers);
                if (num_clobbers)
@@ -3120,26 +3125,6 @@ eliminate_regs_in_insn (rtx insn, int replace)
                  }
                gcc_assert (INSN_CODE (insn) >= 0);
              }
-           /* If we have a nonzero offset, and the source is already
-              a simple REG, the following transformation would
-              increase the cost of the insn by replacing a simple REG
-              with (plus (reg sp) CST).  So try only when we already
-              had a PLUS before.  */
-           else if (plus_src)
-             {
-               new_body = old_body;
-               if (! replace)
-                 {
-                   new_body = copy_insn (old_body);
-                   if (REG_NOTES (insn))
-                     REG_NOTES (insn) = copy_insn_1 (REG_NOTES (insn));
-                 }
-               PATTERN (insn) = new_body;
-               old_set = single_set (insn);
-
-               XEXP (SET_SRC (old_set), 0) = to_rtx;
-               XEXP (SET_SRC (old_set), 1) = GEN_INT (offset);
-             }
            else
              break;