+2006-01-28 Adam Nemet <anemet@caviumnetworks.com>
+
+ * combine.c (simplify_comparison <AND>): Check
+ TRULY_NOOP_TRUNCATION before start using a subreg.
+
+ * config/mips/mips.md (*branch_zero<mode>,
+ *branch_zero<mode>_inverted, *branch_equality<mode>,
+ *branch_equality<mode>_inverted, *branch_equality<mode>_mips16):
+ Remove mode check from comparisons.
+
2006-01-28 Kenneth Zadeck <zadeck@naturalbridge.com>
* config/mips/mips-protos.h (mips_set_live_on_entry): Deleted.
/* If this AND operation is really a ZERO_EXTEND from a narrower
mode, the constant fits within that mode, and this is either an
equality or unsigned comparison, try to do this comparison in
- the narrower mode. */
+ the narrower mode.
+
+ Note that in:
+
+ (ne:DI (and:DI (reg:DI 4) (const_int 0xffffffff)) (const_int 0))
+ -> (ne:DI (reg:SI 4) (const_int 0))
+
+ unless TRULY_NOOP_TRUNCATION allows it or the register is
+ known to hold a value of the required mode the
+ transformation is invalid. */
if ((equality_comparison_p || unsigned_comparison_p)
&& GET_CODE (XEXP (op0, 1)) == CONST_INT
&& (i = exact_log2 ((INTVAL (XEXP (op0, 1))
& GET_MODE_MASK (mode))
+ 1)) >= 0
&& const_op >> i == 0
- && (tmode = mode_for_size (i, MODE_INT, 1)) != BLKmode)
+ && (tmode = mode_for_size (i, MODE_INT, 1)) != BLKmode
+ && (TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (tmode),
+ GET_MODE_BITSIZE (GET_MODE (op0)))
+ || (REG_P (XEXP (op0, 0))
+ && reg_truncated_to_mode (tmode, XEXP (op0, 0)))))
{
op0 = gen_lowpart (tmode, XEXP (op0, 0));
continue;
(define_insn "*branch_zero<mode>"
[(set (pc)
(if_then_else
- (match_operator:GPR 0 "comparison_operator"
- [(match_operand:GPR 2 "register_operand" "d")
- (const_int 0)])
+ (match_operator 0 "comparison_operator"
+ [(match_operand:GPR 2 "register_operand" "d")
+ (const_int 0)])
(label_ref (match_operand 1 "" ""))
(pc)))]
"!TARGET_MIPS16"
(define_insn "*branch_zero<mode>_inverted"
[(set (pc)
(if_then_else
- (match_operator:GPR 0 "comparison_operator"
- [(match_operand:GPR 2 "register_operand" "d")
- (const_int 0)])
+ (match_operator 0 "comparison_operator"
+ [(match_operand:GPR 2 "register_operand" "d")
+ (const_int 0)])
(pc)
(label_ref (match_operand 1 "" ""))))]
"!TARGET_MIPS16"
(define_insn "*branch_equality<mode>"
[(set (pc)
(if_then_else
- (match_operator:GPR 0 "equality_operator"
- [(match_operand:GPR 2 "register_operand" "d")
- (match_operand:GPR 3 "register_operand" "d")])
+ (match_operator 0 "equality_operator"
+ [(match_operand:GPR 2 "register_operand" "d")
+ (match_operand:GPR 3 "register_operand" "d")])
(label_ref (match_operand 1 "" ""))
(pc)))]
"!TARGET_MIPS16"
(define_insn "*branch_equality<mode>_inverted"
[(set (pc)
(if_then_else
- (match_operator:GPR 0 "equality_operator"
- [(match_operand:GPR 2 "register_operand" "d")
- (match_operand:GPR 3 "register_operand" "d")])
+ (match_operator 0 "equality_operator"
+ [(match_operand:GPR 2 "register_operand" "d")
+ (match_operand:GPR 3 "register_operand" "d")])
(pc)
(label_ref (match_operand 1 "" ""))))]
"!TARGET_MIPS16"
(define_insn "*branch_equality<mode>_mips16"
[(set (pc)
(if_then_else
- (match_operator:GPR 0 "equality_operator"
- [(match_operand:GPR 1 "register_operand" "d,t")
- (const_int 0)])
+ (match_operator 0 "equality_operator"
+ [(match_operand:GPR 1 "register_operand" "d,t")
+ (const_int 0)])
(match_operand 2 "pc_or_label_operand" "")
(match_operand 3 "pc_or_label_operand" "")))]
"TARGET_MIPS16"