* h8300/h8300.h (CONSTANT_ADDRESS_P): Don't accept CONST or HIGH

        on the H8/300H.
        * h8300.md: Use "m" rather than "o" constraint everywhere
        appropriate.  Cleanup use of "i" and "n" constraints.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@12081 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/config/h8300/h8300.h b/gcc/config/h8300/h8300.h
index 97f81ef..18fc144 100644 (file)
--- a/gcc/config/h8300/h8300.h
+++ b/gcc/config/h8300/h8300.h
@@ -739,8 +739,8 @@ struct rtx_def *function_arg();
        /* We handle signed and unsigned offsets here.  */      \
        && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000)  \
        && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000))   \
-   || GET_CODE (X) == CONST                                    \
-   || GET_CODE (X) == HIGH)
+   || ((GET_CODE (X) == HIGH || GET_CODE (X) == CONST          \
+       && TARGET_H8300)))
 
 /* Nonzero if the constant value X is a legitimate general operand.
    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */

diff --git a/gcc/config/h8300/h8300.md b/gcc/config/h8300/h8300.md
index ae32c1e..911295e 100644 (file)
--- a/gcc/config/h8300/h8300.md
+++ b/gcc/config/h8300/h8300.md
@@ -116,8 +116,8 @@
    (set_attr "cc" "set")])
 
 (define_insn ""
-  [(set (match_operand:QI 0 "general_operand_dst" "=r,r,<,r,r,o")
-       (match_operand:QI 1 "general_operand_src" "I,r>,r,i,o,r"))]
+  [(set (match_operand:QI 0 "general_operand_dst" "=r,r,<,r,r,m")
+       (match_operand:QI 1 "general_operand_src" "I,r>,r,n,m,r"))]
   "register_operand (operands[0],QImode)
    || register_operand (operands[1], QImode)"
   "@
@@ -149,7 +149,7 @@
 
 (define_insn "movstrictqi"
   [(set (strict_low_part (match_operand:QI 0 "general_operand_dst" "=r,r,r,r"))
-                        (match_operand:QI 1 "general_operand_src" "I,r,i,o"))]
+                        (match_operand:QI 1 "general_operand_src" "I,r,n,m"))]
   ""
   "@
    sub.b       %X0,%X0
@@ -180,8 +180,8 @@
    (set_attr "cc" "set")])
 
 (define_insn ""
-  [(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,o")
-       (match_operand:HI 1 "general_operand_src" "I,r>,r,i,o,r"))]
+  [(set (match_operand:HI 0 "general_operand_dst" "=r,r,<,r,r,m")
+       (match_operand:HI 1 "general_operand_src" "I,r>,r,i,m,r"))]
   "register_operand (operands[0],HImode)
    || register_operand (operands[1], HImode)"
   "@
@@ -213,7 +213,7 @@
 
 (define_insn "movstricthi"
   [(set (strict_low_part (match_operand:HI 0 "general_operand_dst" "=r,r,r,r"))
-                        (match_operand:HI 1 "general_operand_src" "I,r,i,o"))]
+                        (match_operand:HI 1 "general_operand_src" "I,r,i,m"))]
   ""
   "@
    sub.w       %T0,%T0
@@ -396,8 +396,8 @@
    (set_attr "cc" "clobber")])
 
 (define_insn "movsi_h8300h"
-  [(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,o,<,r")
-       (match_operand:SI 1 "general_operand_src" "I,r,io,r,r,>"))]
+  [(set (match_operand:SI 0 "general_operand_dst" "=r,r,r,m,<,r")
+       (match_operand:SI 1 "general_operand_src" "I,r,im,r,r,>"))]
   "TARGET_H8300H
    && (register_operand (operands[0], SImode)
        || register_operand (operands[1], SImode))"
@@ -437,8 +437,8 @@
    (set_attr "cc" "set_zn_c0,set,set,set,set,set")])
 
 (define_insn "movsf_h8300h"
-  [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,o,<,r")
-       (match_operand:SF 1 "general_operand_src" "I,r,io,r,r,>"))]
+  [(set (match_operand:SF 0 "general_operand_dst" "=r,r,r,m,<,r")
+       (match_operand:SF 1 "general_operand_src" "I,r,im,r,r,>"))]
   "TARGET_H8300H
    && (register_operand (operands[0], SFmode)
        || register_operand (operands[1], SFmode))"
@@ -534,7 +534,7 @@
 (define_insn "cmpqi"
   [(set (cc0)
        (compare:QI (match_operand:QI 0 "register_operand" "r")
-                   (match_operand:QI 1 "nonmemory_operand" "ri")))]
+                   (match_operand:QI 1 "nonmemory_operand" "rn")))]
   ""
   "cmp.b       %X1,%X0"
   [(set_attr "length" "2")
@@ -565,7 +565,7 @@
 (define_insn ""
   [(set (cc0)
        (compare:HI (match_operand:HI 0 "register_operand" "r,r")
-                   (match_operand:HI 1 "nonmemory_operand" "r,i")))]
+                   (match_operand:HI 1 "nonmemory_operand" "r,n")))]
   "TARGET_H8300H"
   "cmp.w       %T1,%T0"
   [(set_attr "length" "2,4")
@@ -587,7 +587,7 @@
 (define_insn "addqi3"
   [(set (match_operand:QI 0 "register_operand" "=r")
        (plus:QI (match_operand:QI 1 "register_operand" "%0")
-                (match_operand:QI 2 "nonmemory_operand" "ri")))]
+                (match_operand:QI 2 "nonmemory_operand" "rn")))]
   ""
   "add.b       %X2,%X0"
   [(set_attr "length" "2")
@@ -605,7 +605,7 @@
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r")
        (plus:HI (match_operand:HI 1 "register_operand" "%0")
-                (match_operand:HI 2 "adds_subs_operand" "i")))]
+                (match_operand:HI 2 "adds_subs_operand" "n")))]
   ""
   "* return output_adds_subs (operands);"
   [(set_attr "cc" "none_0hit")
@@ -630,7 +630,7 @@
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r,r")
        (plus:HI (match_operand:HI 1 "register_operand" "%0,0")
-                (match_operand:HI 2 "nonmemory_operand" "i,r")))]
+                (match_operand:HI 2 "nonmemory_operand" "n,r")))]
   "TARGET_H8300H"
   "@
    add.w       %T2,%T0
@@ -650,7 +650,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
        (plus:SI (match_operand:SI 1 "register_operand" "%0")
-                (match_operand:SI 2 "adds_subs_operand" "i")))]
+                (match_operand:SI 2 "adds_subs_operand" "n")))]
   "TARGET_H8300H"
   "* return output_adds_subs (operands);"
   [(set_attr "cc" "none_0hit")
@@ -690,7 +690,7 @@
 (define_insn "subqi3"
   [(set (match_operand:QI 0 "register_operand" "=r,r")
        (minus:QI (match_operand:QI 1 "register_operand" "0,0")
-                 (match_operand:QI 2 "nonmemory_operand" "r,i")))]
+                 (match_operand:QI 2 "nonmemory_operand" "r,n")))]
   ""
   "@
    sub.b       %X2,%X0
@@ -711,7 +711,7 @@
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r")
        (minus:HI (match_operand:HI 1 "register_operand" "r")
-                 (match_operand:HI 2 "adds_subs_operand" "i")))]
+                 (match_operand:HI 2 "adds_subs_operand" "n")))]
   ""
   "*
 {
@@ -739,7 +739,7 @@
 (define_insn ""
   [(set (match_operand:HI 0 "register_operand" "=r,&r")
        (minus:HI (match_operand:HI 1 "general_operand" "0,0")
-                 (match_operand:HI 2 "nonmemory_operand" "r,i")))]
+                 (match_operand:HI 2 "nonmemory_operand" "r,n")))]
   "TARGET_H8300H"
   "@
    sub.w       %T2,%T0
@@ -769,7 +769,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "register_operand" "=r")
        (minus:SI (match_operand:SI 1 "general_operand" "0")
-                 (match_operand:SI 2 "adds_subs_operand" "i")))]
+                 (match_operand:SI 2 "adds_subs_operand" "n")))]
   "TARGET_H8300H"
   "*
 {
@@ -1890,7 +1890,7 @@
   [(set (match_operand:HI 0 "register_operand" "=&r")
        (zero_extract:HI (match_operand:HI 1 "register_operand" "r")
                         (const_int 1)
-                        (match_operand:HI 2 "immediate_operand" "i")))]
+                        (match_operand:HI 2 "immediate_operand" "n")))]
   ""
   "sub.w       %0,%0\;bld      %Z2,%Y1\;bst    #0,%X0"
   [(set_attr "cc" "clobber")
@@ -1901,7 +1901,7 @@
        (subreg:HI (zero_extract:SI
                     (match_operand:HI 1 "register_operand" "r")
                     (const_int 1)
-                    (match_operand:HI 2 "immediate_operand" "i")) 1))]
+                    (match_operand:HI 2 "immediate_operand" "n")) 1))]
   ""
   "sub.w       %0,%0\;bld      %Z2,%Y1\;bst    #0,%X0"
   [(set_attr "cc" "clobber")
@@ -2133,7 +2133,7 @@
 (define_insn ""
   [(set (zero_extract:HI (match_operand:HI 0 "register_operand" "+r")
                         (const_int 1)
-                        (match_operand:HI 1 "immediate_operand" "i"))
+                        (match_operand:HI 1 "immediate_operand" "n"))
        (match_operand:HI 2 "register_operand" "r"))]
   ""
   "bld #0,%R2\;bst     %Z1,%Y0 ; i1"
@@ -2164,7 +2164,7 @@
        (match_operator:HI 4 "bit_operator"
           [(zero_extract:HI (match_operand:HI 1 "register_operand" "r")
                             (const_int 1)
-                            (match_operand:HI 2 "immediate_operand" "i"))
+                            (match_operand:HI 2 "immediate_operand" "n"))
            (match_operand:HI 3 "bit_operand" "0")]))]
   ""
   "bld %Z2,%Y1\;%b4    #0,%R0\;bst     #0,%R0; bl1"
@@ -2176,10 +2176,10 @@
        (match_operator:HI 5 "bit_operator"
           [(zero_extract:HI (match_operand:HI 1 "register_operand" "r")
                             (const_int 1)
-                            (match_operand:HI 2 "immediate_operand" "i"))
+                            (match_operand:HI 2 "immediate_operand" "n"))
            (zero_extract:HI (match_operand:HI 3 "register_operand" "r")
                             (const_int 1)
-                            (match_operand:HI 4 "immediate_operand" "i"))]))]
+                            (match_operand:HI 4 "immediate_operand" "n"))]))]
   ""
   "bld %Z2,%Y1\;%b5    %Z4,%Y3\;bst    #0,%R0; bl3"
   [(set_attr "cc" "clobber")