patch from jfc to improve aliasing/scheduling

	* mips.c (save_restore_insns): Set RTX_UNCHANGING_P in register
	save/restore MEM rtl.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@17559 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5dc3e30..6c09995 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+Fri Jan 30 18:30:03 1998  John F Carr  <jfc@mit.edu>
+
+       * mips.c (save_restore_insns): Set RTX_UNCHANGING_P in register
+       save/restore MEM rtl.
+
 Fri Jan 30 09:08:16 1998  Jeffrey A Law  (law@cygnus.com)
 
        * configure.in: Check for declaration of abort.

diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c
index 53beb41..6589ccf 100644 (file)
--- a/gcc/config/mips/mips.c
+++ b/gcc/config/mips/mips.c
@@ -5802,6 +5802,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
                  rtx mem_rtx = gen_rtx (MEM, word_mode,
                                         gen_rtx (PLUS, Pmode, base_reg_rtx,
                                                  GEN_INT (gp_offset - base_offset)));
+                 RTX_UNCHANGING_P (mem_rtx) = 1;
 
                  /* The mips16 does not have an instruction to load
                      $31, so we load $7 instead, and work things out
@@ -6006,6 +6007,7 @@ save_restore_insns (store_p, large_reg, large_offset, file)
                  rtx mem_rtx = gen_rtx (MEM, sz,
                                         gen_rtx (PLUS, Pmode, base_reg_rtx,
                                                  GEN_INT (fp_offset - base_offset)));
+                 RTX_UNCHANGING_P (mem_rtx) = 1;
 
                  if (store_p)
                    {