Fix psimode truncation patterns to not accept MEMs that are not valid for

PSImode.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@30721 138bc75d-0d04-0410-961f-82ee72b054a4

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index facaadc..052c390 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,15 @@
+Tue Nov 30 14:58:14 1999  Nick Clifton  <nickc@cygnus.com>
+
+       * config/mn10200/mn10200.h (PREDICATE_CODES): Add
+       psimode_truncation_operand.
+
+       * config/mn10200/mn10200.c (psimode_truncation_operand): New
+       function.  Return true if the operand is either a MEM valid
+       for a PSImode address or not a MEM at all.
+
+       * config/mn10200/mn10200.md (truncsipsi2): Use
+       psimode_truncation_operand.
+
 1999-11-30  Michael Hayes  <m.hayes@elec.canterbury.ac.nz>
 
        * flow.c (flow_nodes_print, flow_loops_cfg_dump): New functions.

diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c
index 26b8248..6c39af3 100644 (file)
--- a/gcc/config/mn10200/mn10200.c
+++ b/gcc/config/mn10200/mn10200.c
@@ -875,6 +875,19 @@ constant_memory_operand (op, mode)
   return GET_CODE (op) == MEM && CONSTANT_ADDRESS_P (XEXP (op, 0));
 }
 
+/* Return true if OP is valid for a psi mode truncation operand.
+   It must either be a memory operand which is valid for a PSImode
+   address, or if it is not a memory operand at all.  */
+int
+psimode_truncation_operand (op, mode)
+     rtx op;
+     enum machine_mode mode;
+{
+  return (general_operand (op, mode)
+         && (GET_CODE (op) != MEM
+             || memory_address_p (PSImode, XEXP (op, 0))));
+}
+
 /* What (if any) secondary registers are needed to move IN with mode
    MODE into a register from in register class CLASS. 
 

diff --git a/gcc/config/mn10200/mn10200.h b/gcc/config/mn10200/mn10200.h
index 6f9cceb..abb50c9 100644 (file)
--- a/gcc/config/mn10200/mn10200.h
+++ b/gcc/config/mn10200/mn10200.h
@@ -1063,6 +1063,8 @@ do { char dstr[30];                                       \
 #define PREDICATE_CODES                                                        \
   {"call_address_operand",     { SYMBOL_REF, REG }},                   \
   {"constant_memory_operand",  { MEM }},                               \
+  {"psimode_truncation_operand",{ PLUS, CONST_INT, CONST_DOUBLE, CONST,        \
+                                 SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM }},\
   {"extendpsi_operand",                { PLUS, CONST_INT, CONST_DOUBLE, CONST, \
                                  SYMBOL_REF, LABEL_REF, SUBREG, REG, MEM }}, \
   {"nshift_operator",          { ASHIFTRT, LSHIFTRT, ASHIFT }},
@@ -1078,5 +1080,6 @@ extern enum reg_class secondary_reload_class ();
 extern char *emit_a_shift ();
 extern char *output_tst ();
 extern int extendpsi_operand ();
+extern int psimode_truncation_operand ();
 extern struct rtx_def *zero_dreg;
 extern struct rtx_def *zero_areg;

diff --git a/gcc/config/mn10200/mn10200.md b/gcc/config/mn10200/mn10200.md
index 91057ab..3bfb204 100644 (file)
--- a/gcc/config/mn10200/mn10200.md
+++ b/gcc/config/mn10200/mn10200.md
@@ -1165,7 +1165,7 @@
 
 (define_insn "truncsipsi2"
   [(set (match_operand:PSI 0 "general_operand" "=a,?d,?*d,da")
-       (truncate:PSI (match_operand:SI 1 "general_operand" "m,?m,?*d,i")))]
+       (truncate:PSI (match_operand:SI 1 "psimode_truncation_operand" "m,?m,?*d,i")))]
    ""
    "@
    mov %1,%0
@@ -1785,7 +1785,7 @@
 (define_insn ""
   [(set (match_operand:PSI 0 "general_operand" "=d,d,a,da")
        (truncate:PSI
-         (ashift:SI (match_operand:SI 1 "general_operand" "d,m,m,i")
+         (ashift:SI (match_operand:SI 1 "psimode_truncation_operand" "d,m,m,i")
                     (match_operand:HI 2 "const_int_operand" "i,i,i,i"))))]
   ""
   "*