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* alpha.md (movhi and movqi patterns): Correct predicate for !BWX.
authorrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>
Sat, 7 Aug 1999 06:38:33 +0000 (06:38 +0000)
committerrth <rth@138bc75d-0d04-0410-961f-82ee72b054a4>
Sat, 7 Aug 1999 06:38:33 +0000 (06:38 +0000)
        Remove fp reg alternatives.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@28576 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/alpha/alpha.md

index 82b987c..e0232f1 100644 (file)
@@ -1,3 +1,8 @@
+Sat Aug  7 00:21:20 1999  Richard Henderson  <rth@cygnus.com>
+
+       * alpha.md (movhi and movqi patterns): Correct predicate for !BWX.
+       Remove fp reg alternatives.
+       
 Sat Aug  7 00:06:54 1999  Jeffrey A Law  (law@cygnus.com)
 
        * gcc.texi: Update bug reporting text.
index 4cb2b5b..9fb35d9 100644 (file)
   [(set_attr "type" "ilog,iadd,iadd,ldsym,ild,ist,fcpys,fld,fst")])
 
 (define_insn ""
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,f")
-       (match_operand:HI 1 "input_operand" "rJ,n,fJ"))]
+  [(set (match_operand:HI 0 "register_operand" "=r,r")
+       (match_operand:HI 1 "input_operand" "rJ,n"))]
   "! TARGET_BWX
    && (register_operand (operands[0], HImode)
        || register_operand (operands[1], HImode))"
   "@
    mov %r1,%0
-   lda %0,%L1
-   fmov %R1,%0"
-  [(set_attr "type" "ilog,iadd,fcpys")])
+   lda %0,%L1"
+  [(set_attr "type" "ilog,iadd")])
 
 (define_insn ""
-  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m,f")
-       (match_operand:HI 1 "input_operand" "rJ,n,m,rJ,fJ"))]
+  [(set (match_operand:HI 0 "nonimmediate_operand" "=r,r,r,m")
+       (match_operand:HI 1 "input_operand" "rJ,n,m,rJ"))]
   "TARGET_BWX
    && (register_operand (operands[0], HImode)
        || reg_or_0_operand (operands[1], HImode))"
    mov %r1,%0
    lda %0,%L1
    ldwu %0,%1
-   stw %r1,%0
-   fmov %R1,%0"
-  [(set_attr "type" "ilog,iadd,ild,ist,fcpys")])
+   stw %r1,%0"
+  [(set_attr "type" "ilog,iadd,ild,ist")])
 
 (define_insn ""
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,f")
-       (match_operand:QI 1 "input_operand" "rJ,n,fJ"))]
+  [(set (match_operand:QI 0 "register_operand" "=r,r")
+       (match_operand:QI 1 "input_operand" "rJ,n"))]
   "! TARGET_BWX
    && (register_operand (operands[0], QImode)
        || register_operand (operands[1], QImode))"
   "@
    mov %r1,%0
-   lda %0,%L1
-   fmov %R1,%0"
-  [(set_attr "type" "ilog,iadd,fcpys")])
+   lda %0,%L1"
+  [(set_attr "type" "ilog,iadd")])
 
 (define_insn ""
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m,f")
-       (match_operand:QI 1 "input_operand" "rJ,n,m,rJ,fJ"))]
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=r,r,r,m")
+       (match_operand:QI 1 "input_operand" "rJ,n,m,rJ"))]
   "TARGET_BWX
    && (register_operand (operands[0], QImode)
        || reg_or_0_operand (operands[1], QImode))"
    mov %r1,%0
    lda %0,%L1
    ldbu %0,%1
-   stb %r1,%0
-   fmov %R1,%0"
-  [(set_attr "type" "ilog,iadd,ild,ist,fcpys")])
+   stb %r1,%0"
+  [(set_attr "type" "ilog,iadd,ild,ist")])
 
 ;; We do two major things here: handle mem->mem and construct long
 ;; constants.