2003-05-18 Jason Eckhardt <jle@rice.edu>

gas:
        * config/tc-i860.c (i860_process_insn): Initialize fc after
        each opcode mismatch.

include/opcode:
        * i860.h (form, pform): Add missing .dd suffix.

opcodes:
        * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
        print it.

bfd:
        * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index b5a6a89..646cdd5 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,7 @@
+2003-05-18  Jason Eckhardt  <jle@rice.edu>
+
+       * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
+
 2003-05-17  Andreas Schwab  <schwab@suse.de>
 
        * elf32-m68k.c (elf_m68k_check_relocs): Cache reloc section in

diff --git a/bfd/elf32-i860.c b/bfd/elf32-i860.c
index 7a132c6..74112f1 100644 (file)
--- a/bfd/elf32-i860.c
+++ b/bfd/elf32-i860.c
@@ -803,7 +803,7 @@ elf32_i860_relocate_highadj (input_bfd, rel, contents, value)
   insn = bfd_get_32 (input_bfd, contents + rel->r_offset);
 
   value += rel->r_addend;
-  value += (value & 0x8000) << 1; 
+  value += 0x8000; 
   value = ((value >> 16) & 0xffff);
 
   insn = (insn & 0xffff0000) | value;

diff --git a/gas/ChangeLog b/gas/ChangeLog
index d3451be..cf40ace 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2003-05-18  Jason Eckhardt  <jle@rice.edu>
+
+       * config/tc-i860.c (i860_process_insn): Initialize fc after
+       each opcode mismatch.
+
 2003-05-16  Kelley Cook  <kelleycook@wideopenwest.com>
 
        * configure.in: Accept i[3-7]86 variants.

diff --git a/gas/config/tc-i860.c b/gas/config/tc-i860.c
index 18bb1ef..cdb12cd 100644 (file)
--- a/gas/config/tc-i860.c
+++ b/gas/config/tc-i860.c
@@ -477,6 +477,7 @@ i860_process_insn (str)
       int t;
       opcode = insn->match;
       memset (&the_insn, '\0', sizeof (the_insn));
+      fc = 0;
       for (t = 0; t < MAX_FIXUPS; t++)
         {
           the_insn.fi[t].reloc = BFD_RELOC_NONE;

diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 0c666ec..9aff274 100644 (file)
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2003-05-18  Jason Eckhardt  <jle@rice.edu>
+
+       * i860.h (form, pform): Add missing .dd suffix.
+
 2003-05-13  Stephane Carrez  <stcarrez@nerim.fr>
 
        * m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000

diff --git a/include/opcode/i860.h b/include/opcode/i860.h
index 2d6ea19..4e95b10 100644 (file)
--- a/include/opcode/i860.h
+++ b/include/opcode/i860.h
@@ -478,8 +478,8 @@ static const struct i860_opcode i860_opcodes[] =
 { "pfaddp",    0x48000450, 0xb40001af, "e,f,g", 0 },   /* pfaddp fsrc1,fsrc2,fdest */
 { "faddz",     0x480001d1, 0xb400042e, "e,f,g", 0 },   /* faddz fsrc1,fsrc2,fdest */
 { "pfaddz",    0x480005d1, 0xb400002e, "e,f,g", 0 },   /* pfaddz fsrc1,fsrc2,fdest */
-{ "form",      0x480001da, 0xb4000425, "e,g", 0 },     /* form fsrc1,fdest */
-{ "pform",     0x480005da, 0xb4000025, "e,g", 0 },     /* pform fsrc1,fdest */
+{ "form.dd",   0x480001da, 0xb4000425, "e,g", 0 },     /* form fsrc1,fdest */
+{ "pform.dd",  0x480005da, 0xb4000025, "e,g", 0 },     /* pform fsrc1,fdest */
 
 /* Floating point pseudo-instructions.  */
 { "fmov.ss",   0x48000049, 0xb7e005b6, "e,g", 0 },     /* fiadd.ss fsrc1,f0,fdest */

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index c30e25a..de8f363 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2003-05-18  Jason Eckhardt  <jle@rice.edu>
+
+       * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
+       print it.
+
 2003-05-17  Andreas Jaeger  <aj@suse.de>
 
         * Makefile.am (libopcodes_la_LIBADD): Add libbfd.la.

diff --git a/opcodes/i860-dis.c b/opcodes/i860-dis.c
index ba183ab..69a106d 100644 (file)
--- a/opcodes/i860-dis.c
+++ b/opcodes/i860-dis.c
@@ -138,8 +138,11 @@ print_insn_i860 (memaddr, info)
       const char *s;
       int val;
 
-      /* If this a flop and its dual bit is set, prefix with 'd.'.  */         
-      if ((insn & 0xfc000000) == 0x48000000 && (insn & 0x200))
+      /* If this a flop (or a shrd) and its dual bit is set,
+         prefix with 'd.'.  */         
+      if (((insn & 0xfc000000) == 0x48000000
+           || (insn & 0xfc000000) == 0xb0000000)
+          && (insn & 0x200))
        (*info->fprintf_func) (info->stream, "d.%s\t", opcode->name);
       else
        (*info->fprintf_func) (info->stream, "%s\t", opcode->name);